CY7C68033 CYPRESS [Cypress Semiconductor], CY7C68033 Datasheet - Page 4

• Manufacturer Part Number: CY7C68033
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 001-04247 Rev. *D
Table 1. Special Function Registers
Buses
The NX2LP-Flex features an 8- or 16-bit ‘FIFO’ bidirectional
data bus, multiplexed on I/O ports B and D.
The default firmware image implements an 8-bit data bus in
GPIF Master mode. It is recommended that additional inter-
faces added to the default firmware image use this 8-bit data
bus.
C
D
A
B
E
F
x
0
1
2
3
4
5
6
7
8
9
CKCON
TMOD
PCON
TCON
DPH0
DPH1
DPL0
DPL1
DPS
IOA
TH0
TH1
TL0
TL1
SP
8x
AUTOPTRH1
AUTOPTRH2
AUTOPTRL1
AUTOPTRL2
RESERVED
RESERVED
MPAGE
SCON0
SBUF0
EXIF
IOB
9x
AUTOPTRSET-UP
EP24FIFOFLGS
EP68FIFOFLGS
EP2468STAT
INT2CLR
INT4CLR
IOC
Ax
IE
GPIFSGLDATLNOX
Enumeration
During the start-up sequence, internal logic checks for the
presence of NAND Flash with valid firmware. If valid firmware
is found, the NX2LP-Flex loads it and operates according to
the firmware. If no NAND Flash is detected, or if no valid
firmware is found, the NX2LP-Flex uses the default values
from internal ROM space for manufacturing mode operation.
The two modes of operation are described in the section
Mode” on page 5.
”Normal Operation Mode” on page 5 and ”Manufacturing
GPIFSGLDATLX
GPIFSGLDATH
EP01STAT
GPIFTRIG
OEA
OEB
OEC
OED
OEE
IOD
IOE
Bx
IP
CY7C68033/CY7C68034
RCAP2H
RCAP2L
SCON1
T2CON
SBUF1
TH2
TL2
Cx
EICON
PSW
Dx
ACC
EIE
Ex
Page 4 of 33
EIP
Fx
B
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