MK20DN512VMC10 FREESCALE [Freescale Semiconductor, Inc], MK20DN512VMC10 Datasheet - Page 69

• Manufacturer Part Number: MK20DN512VMC10
• Description: K20 Sub-Family
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

8.1 K20 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
Freescale Semiconductor, Inc.
MAP
BGA
121
H7
G4
G7
G1
G2
H1
H2
G5
E4
E3
E2
F4
E7
F7
F3
E6
L6
F1
F2
J1
J2
K1
K2
L1
L2
F5
PTE0
PTE1/
LLWU_P0
PTE2/
LLWU_P1
PTE3
VDD
VSS
PTE4/
LLWU_P2
PTE5
PTE6
VDD
VSS
VSS
USB0_DP
USB0_DM
VOUT33
VREGIN
ADC0_DP1
ADC0_DM1
ADC1_DP1
ADC1_DM1
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
VDDA
VREFH
Pin Name
ADC1_SE4a
ADC1_SE5a
ADC1_SE6a
ADC1_SE7a
VDD
VSS
DISABLED
DISABLED
DISABLED
VDD
VSS
VSS
USB0_DP
USB0_DM
VOUT33
VREGIN
ADC0_DP1
ADC0_DM1
ADC1_DP1
ADC1_DM1
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
VDDA
VREFH
Default
ADC1_SE4a
ADC1_SE5a
ADC1_SE6a
ADC1_SE7a
VDD
VSS
VDD
VSS
VSS
USB0_DP
USB0_DM
VOUT33
VREGIN
ADC0_DP1
ADC0_DM1
ADC1_DP1
ADC1_DM1
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
VDDA
VREFH
ALT0
K20 Sub-Family Data Sheet, Rev. 1, 6/2012.
PTE0
PTE1/
LLWU_P0
PTE2/
LLWU_P1
PTE3
PTE4/
LLWU_P2
PTE5
PTE6
ALT1
General Business Information
SPI1_PCS1
SPI1_SOUT
SPI1_SCK
SPI1_SIN
SPI1_PCS0
SPI1_PCS2
SPI1_PCS3
ALT2
Preliminary
UART1_TX
UART1_RX
UART1_CTS_b SDHC0_DCLK
UART1_RTS_b SDHC0_CMD
UART3_TX
UART3_RX
UART3_CTS_b I2S0_MCLK
ALT3
SDHC0_D1
SDHC0_D0
SDHC0_D3
SDHC0_D2
ALT4
ALT5
I2C1_SDA
I2C1_SCL
ALT6
RTC_CLKOUT
SPI1_SIN
SPI1_SOUT
USB_SOF_
OUT
ALT7
EzPort
Pinout
69