CY7C4201 CYPRESS [Cypress Semiconductor], CY7C4201 Datasheet - Page 9

• Manufacturer Part Number: CY7C4201
• Description: 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-06016 Rev. *A
Switching Waveforms
Read Cycle Timing
Reset Timing
Notes:
WEN2/LD
14. t
15. t
REN1,REN2
between the rising edge of RCLK and the rising edge of WCLK is less than t
between the rising edge of WCLK and the rising edge of RCLK is less than t
Q
SKEW1
SKEW1
Q
EF,PAE
FF,PAF,
WEN1
WEN2
WCLK
RCLK
0
REN1,
WEN1
0 -
REN2
–Q
OE
EF
RS
[17]
Q
is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that FF will go HIGH during the current clock cycle. If the time
is the minimum time between a rising WCLK edge and a rising RCLK edge to guarantee that EF will go HIGH during the current clock cycle. It the time
8
8
[16]
t
ENS
t
OLZ
(continued)
t
ENH
t
CLKH
t
t
A
REF
t
t
t
RSF
RSF
RSF
t
OE
t
RS
t
t
t
t
RSS
RSS
RSS
CKL
t
SKEW1
NO OPERATION
[15]
t
CLKL
SKEW1
SKEW1
, then FF may not change state until the next WCLK rising edge.
, then EF may not change state until the next RCLK rising edge.
VALID DATA
t
t
t
RSR
RSR
RSR
t
REF
CY7C4421/4201/4211/4221
t
OHZ
CY7C4231/4241/4251
OE=0
OE=1
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