CY7C199CN CYPRESS [Cypress Semiconductor], CY7C199CN Datasheet - Page 11
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CY7C199CN
Manufacturer Part Number
CY7C199CN
Description
256 K (32 K x 8) Static RAM 2.0 V data retention
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY7C199CN.pdf
(18 pages)
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Timing Waveforms
Write Cycle 2
Notes
Document #: 001-06435 Rev. *E
13. This cycle is WE controlled, OE is HIGH during write.
14. Data in and/or out is high impedance if OE = V
15. During this period the IOs are in output state and input signals must not be applied.
16. This cycle is CE controlled.
17. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
Data In/Out
Address
WE
CE
(CE controlled)
High Z
(continued)
[14, 16, 17]
IH
.
t
SA
t
AW
t
WC
Data-In Valid
t
SD
t
SCE
t
t
HA
HD
CY7C199CN
High Z
Page 11 of 18
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