HEF40175B_10 NXP [NXP Semiconductors], HEF40175B_10 Datasheet - Page 3

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HEF40175B_10

Manufacturer Part Number
HEF40175B_10
Description
Quad D-type flip-flop Standardized symmetrical output characteristics
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
6. Pinning information
Table 2.
7. Functional description
Table 3.
[1]
HEF40175B
Product data sheet
Symbol
MR
Q0 to Q3
Q0 to Q3
D0 to D3
V
CP
V
Input
CP
X
Fig 3.
SS
DD
H = HIGH voltage level; L = LOW voltage level; X = don’t care;  = positive-going transition;  = negative-going transition.
Pin configuration SOT38-4 and SOT109-1
Pin description
Function table
V
MR
6.1 Pinning
6.2 Pin description
Q0
Q0
Q1
Q1
D0
D1
SS
1
2
3
4
5
6
7
8
Pin
1
2, 7, 10, 15
3, 6, 11, 14
4, 5, 12, 13
8
9
16
HEF40175B
Dn
H
L
X
X
[1]
001aae570
16
15
14
13
12
11
10
9
V
Q3
Q3
D3
D2
Q2
Q2
CP
DD
All information provided in this document is subject to legal disclaimers.
Description
master reset input (active LOW)
buffered output
complementary buffered output
data input
ground supply voltage
clock input (LOW-to-HIGH edge-triggered)
supply voltage
Rev. 6 — 14 December 2010
MR
H
H
H
L
Fig 4.
Pin configuration SOT403-1
V
Output
Qn
H
L
no change
L
MR
Q0
Q0
D0
D1
Q1
Q1
SS
1
2
3
4
5
6
7
8
HEF40175B
HEF40175B
001aan211
Quad D-type flip-flop
Qn
L
H
no change
H
© NXP B.V. 2010. All rights reserved.
16
15
14
13
12
11
10
9
V
Q3
Q3
D3
D2
Q2
Q2
CP
DD
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