LV8138V SANYO [Sanyo Semicon Device], LV8138V Datasheet - Page 17

• Manufacturer Part Number: LV8138V
• Description: Bi-CMOS IC For Brushless Motor Drive Sine wave PWM Drive, Pre driver IC
• Manufacturer: SANYO [Sanyo Semicon Device]

• Drive phase adjustment
During 180-degree current-carrying drive, any lead angle from 0 to 58 degrees can be set using the ADP1 pin voltage
(lead angle control). This setting can be adjusted in 32 steps (in 1.875-degree increments) from 0 to 58 degrees using the
ADP1 pin voltage, and it is updated every Hall signal cycle (it is sampled at the rising edge of the IN3 input and updated
at its falling edge).
A number of lead angle adjustments proportionate to the CTL pin voltage can be undertaken by adjusting the resistance
levels of resistors connected to the ADP1 pin, ADP2 pin and DPL pin. When these pins are not going to be used,
reference must be made to section 4.5, and the pins must not be used in the open status. Furthermore, a resistance of
47kΩ or more must be used for the resistor (RADP2) that is connected to the ADP2 pin.
1. The slopes of V CTL and VADP1 can be adjusted by setting the resistance level of the resistor (RADP1) connected to
2. The ADP2 pin rise can be halted (a limit on the lead angle adjustment can be set by means of the CTL voltage) by
3. The offset and slope can be adjusted as desired by setting RADP1 and RADP12 of ADP1 (pin 15). (It is also possible
4. When the lead angle is not adjusted
5. When the lead angle is not adjusted by means of the CTL pin voltage (for use with a fixed lead angle)
ADP1 (pin 15).
setting DPL (pin 10).
to set a limit on the lead angle adjustment by means of the CTL voltage by setting DPL.)
ADP1 pin: shorted to ground; ADP2 pin and DPL pin: pulled down to ground using the resistors
ADP1 pin: lead angle setting by resistance division from VREG; ADP2 pin and DPL pin: pulled down to ground by
the resistors
VADP1,VADP2[V]
58°
0°
VADP1,VADP2[V]
VADP1,VADP2[V]
58∞
58°
4.25V
0.88V
0∞
0°
2.5V
5V
0V
2.34V
1.25V
1.17V
2.5V
2.5V
5V
0V
5V
0V
2.1V
2.1V
3.75V
5.4V
5.4V
ADP2
ADP2
ADP2
LV8138V
VCTL[V]
VCTL[V]
VCTL[V]
VADP2=(VCTL-2.1)×(2.5/3.3)
IADP2=VADP2/RADP2
IADP1=2×IADP2
VADP1=((RADP1×RADP12)/(RADP1+RADP12))×IADP1
RDPL1
VADP2=(VCTL-2.1)×(2.5/3.3)
IADP2=VADP2/RADP2
IADP1=2×IADP2
VADP1=IADP1×RADP1
VADP2=(VCTL-2.1)×(2.5/3.3)
IADP2=VADP2/RADP2
IADP1=2×IADP2
VADP1=IADP1×RADP1
DPLLIM=VDPL×1.5
RDPL1
RDPL1
VREG
VREG
VREG
+(RADP1/(RADP1+RADP12))×VREG
RDPL2
IADP2
IADP2
IADP2
RADP2
IADP1
RADP2
RADP2
IADP1
IADP1
RADP1
VREG
RADP1
RADP1
No.A2013-17/19
RDPL12