AD9516-0_07 AD [Analog Devices], AD9516-0_07 Datasheet - Page 70
AD9516-0_07
Manufacturer Part Number
AD9516-0_07
Description
14-Output Clock Generator with Integrated 2.8 GHz VCO
Manufacturer
AD [Analog Devices]
Datasheet
1.AD9516-0_07.pdf
(84 pages)
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Reg.
Addr
(Hex) Bit(s) Name
F0
F0
F0
F1
Reg.
Addr
(Hex) Bit(s) Name
AA
AA
AB
AD9516-0
Table 55. LVPECL Outputs
<5:3> OUT9 Ramp
<2:0> OUT9 Ramp
<5:0> OUT9 Delay
<4>
<3:2> OUT0 LVPECL Sets the LVPECL output differential voltage (V
<1:0> OUT0
<4>
Capacitors
Current
Fraction
OUT0 Invert
Differential
Voltage
Power-Down <1>
OUT1 Invert
Description
Sets the output polarity.
<4> = 0; noninverting.
<4> = 1; inverting.
<3>
0
0
1
1
LVPECL power-down modes.
0
0
1
1
Sets the output polarity.
<4> = 0; noninverting.
<4> = 1; inverting.
Description
Selects the number of ramp capacitors used by the delay function. The combination of the number of
capacitors and the ramp current sets the delay full scale.
<5> <4> <3> Number of Capacitors
0
0
0
0
1
1
1
1
Ramp current for the delay function. The combination of the number of capacitors and the ramp
current sets the delay full scale.
<2> <1> <0> Current Value (μA)
0
0
0
0
1
1
1
1
Selects the fraction of the full-scale delay desired (6-bit binary).
000000 gives zero delay.
Only delay values up to 47 decimal (101111b; 0x2F) are supported.
<2> V
0
1
0
1
<0> Mode
0
1
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
400
600
780
960
Normal operation.
Partial power-down, reference on; use only if there are no external load resistors.
Partial power-down, reference on, safe LVPECL power-down.
Total power-down, reference off; use only if there are no external load resistors.
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
OD
(mV)
4
3
3
2
3
2
2
1
200
400
600
800
1000
1200
1400
1600
Rev. 0 | Page 70 of 84
OD
).
Output
On
Off
Off
Off
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