CAT24WC32 CATALYST [Catalyst Semiconductor], CAT24WC32 Datasheet - Page 3

• Manufacturer Part Number: CAT24WC32
• Description: 32K/64K-Bit I2C Serial CMOS E2PROM
• Manufacturer: CATALYST [Catalyst Semiconductor]

V
Output Load is 1 TTL Gate and 100pF
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) t
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
program/erase cycle. During the write cycle, the bus
CC
PUR
t
t
F
T
t
t
t
t
t
t
t
t
t
t
t
t
PUW
PUR
= +1.8V to +6V, unless otherwise specified
AA
BUF
HD:STA
LOW
HIGH
SU:STA
HD:DAT
SU:DAT
R
F
SU:STO
DH
SCL
I
t
(1)
(1)
(1)
WR
and t
(1)
PUW
are the delays required from the time V
Power-Up to Read Operation
Power-Up to Write Operation
Clock Frequency
Noise Suppression Time
Constant at SCL, SDA Inputs
SCL Low to SDA Data Out
and ACK Out
Time the Bus Must be Free Before
a New Transmission Can Start
Start Condition Hold Time
Clock Low Period
Clock High Period
Start Condition Setup Time
(for a Repeated Start Condition)
Data In Hold Time
Data In Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
Write Cycle Time
CC
is stable until the specified operation can be initiated.
3
100
4.7
4.7
4.7
50
4
4
0
4
interface circuits are disabled, SDA is allowed to remain
high, and the device does not respond to its slave
address.
100
200
300
3.5
1
100
1.2
0.6
1.2
0.6
0.6
0.6
50
0
1
1
10
400
200
300
0.3
1
Doc. No. 1039, Rev. F
ms
ms
ms
kHz
ns
µs
µs
µs
µs
µs
µs
ns
ns
µs
ns
µs
ns