CAT1027 CATALYST [Catalyst Semiconductor], CAT1027 Datasheet - Page 6

• Manufacturer Part Number: CAT1027
• Description: Dual Voltage Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM
• Manufacturer: CATALYST [Catalyst Semiconductor]

Notes:
1. Test Conditions according to “AC Test Conditions” table.
2. Power-up, Input Reference Voltage V
3. Power-Down, Input Reference Voltage V
4. V
5. 0 < V
6. This parameter is characterized initially and after a design or process change that affects the parameter. Not 100% tested.
7. t
8. Latch-up protection is provided for stresses up to 100mA on input and output pins from -1 V to V
AC TEST CONDITIONS
CAT1026, CAT1027
RELIABILITY CHARACTERISTICS
Doc. No. 3010, Rev. K
VOLTAGE MONITOR AND RESET CIRCUIT AC CHARACTERISTICS
P
Symbol
N
T
V
I
LTH
O
DR
ZAP
S
S
END
PUR
CC
W
t
y
t
y
G
t
t
P
t
(6)
(6)(8)
t
m
R
m
R
t
P
U
L
P
O
(6)
W
Glitch Reference Voltage = V
P
(6)
P
U
and t
T I
E
R
U
SENSE
n I
n I
D
D
D
W
b
b
S
C
R
u
2
1
R
T
H
p
p
l o
l o
p t
n I
t u
t u
-
PUW
t u
p
U
t u
R
R
P
R
O
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch-Up
V
P
s i
e
are the delays required from the time V
CC
P
e
u
e f
a
e
I T
e f
u
p t
, V
a r
e r
s l
a
V
P
P
e r
t u
M
V
n
m
LOW
C
e
n
o
o
T
C
d
n
c
w
H
N I
w
L
t e
V
c
e
l G
F
o
o t
V
e
e
e
l o
Output Reference Voltage and Load according to “AC Test Conditions” Table.
W
r e
l l a
a
G
- r
- r
V
S
c t i
a t
V
d
E
R
a
U
l o
R
U
N
6
l o
h
g
i T
c t
E
S
7 ,
p
P
e
P
p
a t
E
e
a t
s
S
R
h
m
a
a
o t
o t
g
s
o t
t e
d
g
THmin
a r
E
a r
e
e
e
o
e
T
e j
R
W
s
s
V
m
i T
m
g
s
CC
t c
e
L
O
i r
m
t e
i T
O
t e
; Based on characterization data.
a
e t
W
= V
CC
u
P
d
e
m
r e
r e
p t
MIL-STD-883, Test Method 1033 1,000,000
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
o
u
D
O
O
= V
e
TH
t u
t u
s l
e
o
p
p
, Reset Output Reference Voltage and Load according to “AC Test Conditions” Table.
e
a l
t u
r e
TH
r e
Reference Test Method
D
y
W
, Reset Output Reference Voltage and Load according to “AC Test Conditions” Table.
e
t a
t a
JEDEC Standard 17
a l
d i
o i
o i
y
h t
CC
n
n
C
r u
is stable until the specified memory operation can be initiated.
e r
0
t n
0
2 .
C
C
3 .
C
C
S
N
o
o
V
L
N
N
N
o
6
N
o
V
n
o
n
T
T
0
C
=
u
o
o
e t
o
d
d
n
o
1
C
C
e
e
5 .
c r
C
e t
e t
e t
e t
d
0
t i
t i
t s
t s
o t
1
, 4
,
t i
o i
o i
: e
V
n
0
0
2
3
5
1
o i
0
s
C
0
n
n
6
7 .
C
8 .
I
s
s
n
p
O
s
V
L
F
V
C
=
C
C
C
3
m
M
M
1
1
3
; A
0 .
n i
n i
0
2000
Min
100
100
CC
T
T
2
1
+ 1 V.
y
0
y
6 .
p
p
0
Max
M
M
2
2
2
2
3
7
5
5
7
7
a
a
0
1 .
0
0
0
x
x
Cycles/Byte
Years
Units
Volts
mA
U
U
s
m
m
m
µ
µ
i n
n
i n
e
s
s
s
s
s
s
c
s t
s t