ICS501-DPK ICST [Integrated Circuit Systems], ICS501-DPK Datasheet - Page 5

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ICS501-DPK

Manufacturer Part Number
ICS501-DPK
Description
LOCO PLL CLOCK MULTIPLIER
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet
MDS 501 K
In te grat ed Circuit Syst ems
AC Electrical Characteristics
VDD = 5.0 V ±5%, Ambient Temperature 0 to +70° C, unless stated otherwise
Note 1: Measured with 15 pF load.
On-Chip Pull-up Resistor
Input Capacitance, S1, S0, and OE
Nominal Output Impedance
Input Frequency, crystal input
Input Frequency, clock input
Output Frequency, VDD = 4.5 to 5.5 V
Output Frequency, VDD = 3.0 to 3.6 V
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
PLL Bandwidth
Output Enable Time, OE high to
output on
Output Disable Time, OE low to
tri-state
Absolute Clock Period Jitter
One Sigma Clock Period Jitter
Parameter
Parameter
525 Ra ce St reet , San Jose, CA 9512 6
Symbol
Symbol
F
F
F
F
t
t
t
OUT
OUT
OR
OD
5
OF
t
t
ja
IN
IN
js
Pin 7
Pins 4, 6, 7
Conditions
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
0.8 to 2.0 V, Note 1
2.0 to 8.0 V, Note 1
1.5 V, up to
160 MHz
Deviation from
mean
Conditions
t el (4 08) 297 -1 201
Min.
Min.
LOCO™
13
13
13
13
45
10
5
2
Typ.
270
20
4
49-51
Typ.
+70
50
50
25
1
1
PLL Clock Multiplier
w w w. i c s t . c o m
Max.
Revision 071304
Max. Units
160
140
100
27
50
90
55
ICS501
Units
MHz
MHz
MHz
MHz
MHz
MHz
kHz
ns
ns
ns
ns
ps
ps
kΩ
%
pF

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