ICS501-DPK ICST [Integrated Circuit Systems], ICS501-DPK Datasheet - Page 2

• Manufacturer Part Number: ICS501-DPK
• Description: LOCO PLL CLOCK MULTIPLIER
• Manufacturer: ICST [Integrated Circuit Systems]

MDS 501 K
In te grated Circuit Systems
Pin Assignment
Common Output Frequency Examples (MHz)
Pin Descriptions
X1/ I CLK
Output
Input
Selection (S1, S0)
Output
Input
Selection (S1, S0)
Number
GND
VDD
Pin
1
2
3
4
5
6
7
8
S1
8 Pi n ( 150 mi l ) SOI C
1
2
3
4
XI/ICLK
Name
GND
VDD
CLK
Pin
OE
S1
S0
X2
M, M
●
0, 0
20
10
64
16
525 Ra ce Street, San Jose, CA 9512 6
Tri-level Iinput
Tri-level Input
8
7
6
5
Output
Output
Power
Power
66.66
16.66
Type
M, M
Input
Input
0, 0
Pin
24
12
X2
OE
S0
CLK
1, M
1, 0
30
10
72
12
Crystal connection or clock input.
Connect to +3.3 V or +5 V.
Connect to ground.
Select 1 for output clock. Connect to GND or VDD or float.
Clock output per table above.
Select 0 for output clock. Connect to GND or VDD or float.
Output enable. Tri-states CLK output when low. Internal pull-up.
Crystal connection. Leave unconnected for clock input.
2
M, M
M, 0
32
16
75
12
Clock Output Table
0 = connect directly to ground
1 = connect directly to VDD
M = leave unconnected (floating)
S1 S0
33.33
16.66
M
M
M
M, M
0
0
0
1
1
1
1, 1
80
10
M
M
M
0
1
0
1
0
1
83.33
16.66
37.5
M, 1
0, 1
12
5.3125X input
3.125X input
6.25X input
4X input
5X input
2X input
6X input
3X input
8X input
Pin Description
●
CLK
tel [phone]
0, 0
1, 0
40
10
90
15
LOCO™
0, 0
100
0, 1
48
12
20
Minimum Input
106.25
16.66
per page 4
per page 4
per page 4
per page 4
per page 4
per page 4
1, M
0, M
50
20
PLL Clock Multiplier
20 MHz
4 MHz
8 MHz
●
w w w. i c s t . c o m
Revision 071304
1, 0
120
1, 1
60
10
15
ICS501
62.5
M, 1
M, 0
125
20
20