ICS2572M ICST [Integrated Circuit Systems], ICS2572M Datasheet

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ICS2572M

Manufacturer Part Number
ICS2572M
Description
User-Programmable Dual High-Performance Clock Generator
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet

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Part Number:
ICS2572M
Manufacturer:
ICS
Quantity:
20 000
User-Programmable Dual High-Performance Clock Generator
Description
The ICS2572 is a dual-PLL (phase-locked loop) clock gener-
ator with differential video outputs specifically designed for
high-resolution, high-refresh rate, video applications. The
video PLL generates any of 16 pre-programmed frequencies
through selection of the address lines FS0-FS3. Similarly, the
auxiliary PLL can generate any one of four pre-programmed
frequencies via the MS0 & MS1 lines.
A unique feature of the ICS2572 is the ability to redefine
frequency selections after power-up. This permits complete
set-up of the frequency table upon system initialization.
Block Diagram
ICS2572RevC090894
XTAL2
XTAL1
Integrated
Circuit
Systems, Inc.
Strobe
MS0
MS1
FS0
FS1
FS2
FS3
VCLK Set &
MCLK Set
Comparator
Program
Interface
Frequency
Oscillator
Mode
Phase-
Crystal
/ M
MCLK PLL (as above)
Charge
Pump
Reference
Divider
/ A
Prescaler
VCO
EXTFREQ
E-95
Features
Applications
Advanced ICS monolithic phase-locked loop
technology
Supports high-resolution graphics - differential CLK out-
put to 185 MHz
Divided dotclock output (LOAD) available
Simplified device programming
Sixteen selectable VCLK frequencies (all user
re-programmable)
Four selectable MCLK frequencies (all user
re-programmable)
Windows NT compatible
High end PC/low end workstation graphics designs
requiring differential output
X Terminal graphics
/ 2
/ 4
/ 8
/ 2
/ 4
/ 8
/1, 4, 5 or 8
LOAD
CLK+
CLK-
MCLK
ICS2572

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ICS2572M Summary of contents

Page 1

Integrated Circuit Systems, Inc. User-Programmable Dual High-Performance Clock Generator Description The ICS2572 is a dual-PLL (phase-locked loop) clock gener- ator with differential video outputs specifically designed for high-resolution, high-refresh rate, video applications. The video PLL generates any of 16 pre-programmed ...

Page 2

ICS2572 Pin Configuration XTAL1 1 20 XTAL2 2 19 XTFREQ 3 18 FS0 4 17 FS1 5 16 STROBE 6 15 FS2 7 14 FS3 8 13 MS0 9 12 VSS 10 11 20-Pin DIP or SOIC J-4, J-7 Pin ...

Page 3

Digital Inputs The FS0-FS3 pins and the STROBE pin are used to select the desired operating frequency of the VCLK output from the 16 pre-programmed/user-programmed selections in the ICS2572. These pins are also used to load new frequency data into ...

Page 4

ICS2572 Observe that the internal shift register is “clocked” tran- sition of FS3 data from “0” to “1.” extended sequence of register loading performed (such as a power-on initiali- zation sequence), note that ...

Page 5

Frequency Synthesizer Description Refer to Figure 1 for a block diagram of the ICS2572. The ICS2572 generates its output frequencies using phase- locked loop techniques. The phase-locked loop (or PLL closed-loop feedback system that drives the output frequency ...

Page 6

ICS2572 External Reference Sources An external frequency source may be used as the reference for the VCLK and MCLK PLLs. To implement this, simply con- nect the reference frequency source to the XTAL1 pin of the ICS2572. For best results, ...

Page 7

Absolute Maximum Ratings Supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -.5V to +7V Logic inputs ...

Page 8

ICS2572 AC Characteristics PARAMETER SYMBOL Phase-Locked Loop: VCLK, MCLK VCO Fvco Frequency PLL Acquire Time Tlock Crystal Oscillator Crystal Frequency Fxtal Range Parallel Loading Capacitance XTAL1 Minimum High Txhi Time XTAL1 Minimum Low Txlo Time Power Supplies: VDD Supply Current ...

Page 9

... MCLK ADDR FbkDiv/PostDiv - Ordering Information ICS2572N-SXX or ICS2572M-SXX Example: ICS XXXX N-SXX S=Strobe Option/XX=Default Frequencies Package Type Device Type (consists digit numbers) Prefix Where: “s” denotes strobe option positive level transparent (i.e., 2494 interface compatible) “xx” denotes default frequencies: ...

Page 10

ICS2572 NOTES E-104 ...

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