AD7885 AD [Analog Devices], AD7885 Datasheet - Page 6

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AD7885

Manufacturer Part Number
AD7885
Description
LC2MOS 16-Bit, High Speed Sampling ADCs
Manufacturer
AD [Analog Devices]
Datasheet

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AD7884/AD7885
AD7884
V
V
AGNDS
AGNDF
AV
AV
GND
V
V
CONVST
CS
RD
BUSY
DB0–DB15
DGND
V
V
INV
REF–
3 V
3 V
5 V
5 V
SS
DD
REF+
REF+
DD
SS
IN
IN
IN
IN
F
S
S
F
S
F
AD7885
V
V
_
_
AGNDS
AGNDF
AV
AV
GND
V
V
CONVST
CS
RD
HBEN
BUSY
DB0–DB7
DGND
V
V
3 V
5 V
5 V
INV
REF–
SS
DD
REF+
REF+
DD
SS
IN
IN
IN
F
S
S
F
AGNDS
AGNDF
AD7885A
V
V
AV
AV
GND
V
V
CONVST
CS
RD
HBEN
BUSY
DB0–DB7
DGND
V
V
3 V
3 V
5 V
5 V
INV
REF–
SS
DD
REF+
REF+
DD
SS
IN
IN
IN
IN
F
S
S
F
S
F
This is the ground return sense pin for the 9-bit ADC and the on-chip residue amplifier.
This is the ground return force pin for the 9-bit ADC and the on-chip residue amplifier.
Description
This pin is connected to the inverting terminal of an op amp, as in Figure 6, and allows
the inversion of the supplied +3 V reference.
This is the negative reference input, and it can be obtained by using an external amplifier
to invert the positive reference input. In this case, the amplifier output is connected to
V
This is the analog input sense pin for the 3 volt analog input range on the AD7884 and
AD7885A.
This is the analog input force pin for the 3 volt analog input range on the AD7884 and
AD7885A. When using this input range, the 5 V
AGND.
This is the analog input pin for the 3 volt analog input range on the AD7885. When us-
ing this input range, the 5 V
This is the analog input sense pin for the 5 volt analog input range on both the AD7884,
AD7885 and AD7885A.
This is the analog input force pin for the 5 volt analog input range on both the AD7884,
AD7885 and AD7885A. When using this input range, the 3 V
should be tied to AGND.
Positive analog power rail for the sample-and-hold amplifier and the residue amplifier.
Negative analog power rail for the sample-and-hold amplifier and the residue amplifier.
This is the ground return for sample-and-hold section.
Negative supply for the 9-bit ADC.
Positive supply for the 9-bit ADC and all device logic.
This asynchronous control input starts conversion.
Chip Select control input.
Read control input. This is used in conjunction with CS to read the conversion result
from the device output latch.
High Byte Enable. Active high control input for the AD7885. It selects either the high or
the low byte of the conversion for reading.
Busy output. The Busy output goes low when conversion begins and stays low until it is
completed, at which time it goes high.
Sixteen-bit parallel data word output on the AD7884.
Eight-bit parallel data byte output on the AD7885.
Ground return for all device logic.
Reference force input.
Reference sense input. The device operates from a +3 V reference.
REF–.
PIN FUNCTION DESCRIPTION
See Figure 6.
–6–
IN
F and 5 V
IN
S pins should be tied to AGND.
IN
F and 5 V
IN
IN
S pins should be tied to
F and 3 V
IN
S pins
REV. C

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