CY7C1021D CYPRESS [Cypress Semiconductor], CY7C1021D Datasheet - Page 5

• Manufacturer Part Number: CY7C1021D
• Description: 1-Mbit (64K x 16) Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Characteristics
Notes
Document #: 38-05462 Rev. *E
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
t
7. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and output loading of the specified
8. t
9. At any given temperature and voltage condition, t
10. t
11. This parameter is guaranteed by design and is not tested.
12. The internal write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE/BLE LOW. CE, WE and BHE/BLE must be LOW to initiate a write,
power
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
DBE
LZBE
HZBE
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
BW
Parameter
I
the outputs enter a high impedance state.
and the transition of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that
terminates the write.
OL
POWER
HZOE
/I
[8]
OH
, t
HZBE
and 30-pF load capacitance.
gives the minimum amount of time that the power supply should be at typical V
, t
[12]
HZCE
, and t
V
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Byte Enable to Data Valid
Byte Enable to Low Z
Byte Disable to High Z
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
Byte Enable to End of Write
CC
(typical) to the first access
HZWE
are specified with a load capacitance of 5 pF as in (c) of
Description
(Over the Operating Range)
[9]
[9]
[9, 10]
[9]
[9, 10]
[9, 10]
HZCE
is less than t
LZCE
, t
HZOE
[7]
is less than t
Min
100
–10 (Industrial)
10
10
0
3
0
3
0
0
7
7
0
0
7
6
3
7
“AC Test Loads and Waveforms [6]” on page
CC
LZOE
values until the first memory access can be performed.
, and t
HZWE
Max
10
10
10
5
5
5
5
5
5
is less than t
LZWE
–12 (Automotive)
Min
100
12
12
10
10
10
10
3
0
3
0
0
0
0
7
0
3
for any given device.
4. Transition is measured when
CY7C1021D
Max
12
12
12
6
6
6
6
6
6
Page 5 of 11
Unit
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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