CY7C057 CYPRESS [Cypress Semiconductor], CY7C057 Datasheet - Page 13

• Manufacturer Part Number: CY7C057
• Description: 3.3V 16K/32K x 36 FLEx36 Asynchronous Dual-Port Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Waveforms
Document #: 38-06055 Rev. **
Timing Diagram of Semaphore Contention
Semaphore Read After Write Timing, Either Side
Notes:
36. CE
37. I/O
38. Semaphores are reset (available to both ports) at cycle start.
39. If t
A
A
A
0R
0L
0
SPS
SEM
0R
0
SEM
SEM
–A
R/W
R/W
I/O
R/W
–A
–A
= HIGH and CE
OE
= I/O
is violated, the semaphore will definitely be obtained by one side or the other, but which side will get the semaphore is unpredictable.
2
2L
0
2R
L
R
R
L
0L
= LOW (request semaphore); CE
1
= LOW for the duration of the above timing (both write and read cycle).
t
SA
(continued)
VALID ADRESS
t
AW
0R
WRITE CYCLE
t
= CE
t
PWE
SCE
t
SD
DATA
0L
t
MATCH
SPS
MATCH
[37, 38, 39]
= HIGH and CE
t
IN
HA
VALID
[36]
t
HD
1R
= CE
t
SWRD
1L
=LOW.
t
SOP
t
SOP
READ CYCLE
t
SAA
VALID ADRESS
t
DOE
t
ACE
DATA
OUT
VALID
CY7C056V
CY7C057V
t
OHA
Page 13 of 23