CY7B923-400JI CYPRESS [Cypress Semiconductor], CY7B923-400JI Datasheet - Page 16

• Manufacturer Part Number: CY7B923-400JI
• Manufacturer: CYPRESS [Cypress Semiconductor]

In systems that require the outputs to be shut off during some
periods when link transmission is prohibited (e.g., for laser
safety functions), the FOTO input can be asserted. While it is
possible to insure that the output state of the PECL drivers is
LOW (i.e., light is off) by sending all 0’s in Bypass mode, it is
often inconvenient to insert this level of control into the data
transmission channel, and it is impossible in Encoded mode.
FOTO is provided to simplify and augment this control function
(typically found in laser-based transmission systems). FOTO
will force OUTA+ and OUTB+ to go LOW, OUTA and OUTB
to go HIGH, while allowing OUTC to continue to function normal-
ly (OUTC is typically used as a diagnostic feedback and cannot be
disabled). This separation of function allows various system configu-
rations without undue load on the control function or data channel
logic.
Transmitter Serial Data Characteristics
The CY7B923 HOTLink Transmitter serial output conforms to
the requirements of the Fibre Channel specification. The se-
Control
Config
Status
Control
Config
Status
Data
Data
&
&
25
24
23
19
18
17
16
15
14
13
12
11
10
21
7
5
8
26
25
4
23
3
5
7
19
18
17
16
15
14
13
12
11
10
22
MODE
FOTO
BISTEN
ENN
ENA
RP
SC/D
D0
D1
D2
D3
D4
D5
D6
D7
SVS
MODE
BISTEN
SO
A/B
RF
RDY
SC/D
D0
D1
D2
D3
D4
D5
D6
D7
RVS
CKW
REFCLK
CKR
(Db)
(Dc)
(Dd)
(De)
(Di)
(Df)
(Dg)
(Dh)
(Qb)
(Qc)
(Qd)
(Qe)
(Qi)
(Qf)
(Qg)
(Qh)
(Dj)
(Qj)
Transmitter
(Da)
(Qa)
CY7B923
GND
6
CY7B933
Receiver
8
OUTA+
OUTA–
OUTB+
OUTB–
OUTC+
OUTC–
GND
VCC
9
20
4
VCC
Figure 6. HOTLink Connection Diagram
6
21
9 22
IB+
IB–
IA+
IA–
20
24
27
26
28
28
27
1
3
2
2
1
.01UF
Unused Output Left
Power Dissipation
.01UF
Open to Minimize
Tx PECL Load
C
D
E
A
B
E
C
D
270
270
16
rial data output is controlled by an internal Phase-Locked Loop
that multiplies the frequency of CKW by ten (10) to maintain
the proper bit clock frequency. The jitter characteristics (in-
cluding both PLL and logic components) are shown below:
Transmitter Test Mode Description
The CY7B923 Transmitter offers two types of test mode oper-
ation, BIST mode and Test mode. In a normal system applica-
tion, the Built-In Self-Test (BIST) mode can be used to check
the functionality of the Transmitter, the Receiver, and the link
connecting them. This mode is available with minimal impact
on user system logic, and can be used as part of the normal
system diagnostics. Typical connections and timing are shown
in Figure 7 .
Transmission
.01UF
Deterministic Jitter (D
sured while sending a continuous K28.5 (C5.0).
Random Jitter (R
while sending a continuous K28.7 (C7.0).
Termination
Tx PECL Load
82
82
Line
Fiber Optic
PECL Load
.01UF
130
130
82
82
.01UF
RL/2
RL/2
A
B
j
649
) < 175 ps (peak-peak). Typically measured
130
130
270
j
) < 35 ps (peak-peak). Typically mea-
270
Signal Det.
Optional
270
1500
.01UF
.01UF
SIG
RX+
RX–
TX+
TX–
Fiber
Fiber
VCC
GND
VCC
GND
TX
RX
B923–22
Fiber Optic
Twisted Pair
Twisted Pair
Fiber Optic
CY7B923
CY7B933
Coax or
Coax or
Tx
Rx