LTC4265 LINER [Linear Technology], LTC4265 Datasheet - Page 5

• Manufacturer Part Number: LTC4265
• Description: IEEE 802.3at High Power PD Interface Controller with 2-Event Classifi cation Recognition
• Manufacturer: LINER [Linear Technology]

PIN FUNCTIONS
SHDN (Pin 1): Shutdown Input. Use this pin for auxiliary
power application. Drive SHDN high to disable LTC4265
operation and corrupt the signature resistance. If unused,
tie SHDN to V
T2PSE (Pin 2): Type-2 PSE Indicator, Open-Drain. Low
impedance indicates the presence of a Type-2 PSE.
R
between R
current. (See Table 2.)
NC (Pin 4, 11): No Connect.
V
must be electrically tied together at the package.
BLOCK DIAGRAM
IN
CLASS
(Pins 5, 6): Input Voltage, Negative Rail. Pins 5 and 6
(Pin 3): Class Select Input. Connect a resistor
CLASS
IN
.
EXPOSED PAD 13
and V
R
T2PSE 2
SHDN
CLASS
IN
V
V
NC 4
IN
IN
to set the classifi cation load
1
3
5
6
CONTROL
CIRCUITS
REF
BOLD LINE INDICATES
HIGH CURRENT PATH
–
+
CLASSIFICATION
CURRENT LOAD
EN
V
V
and 8 must be electrically tied together at the package.
PWRGD (Pin 9): Power Good Output, Open Collector.
High impedance signals power-up completion. PWRGD
is referenced to V
PWRGD (Pin 10): Complementary Power Good Output,
Open-Drain. Low impedance signals power up completion.
PWRGD is referenced to V
GND (Pin 12): Input Voltage, Positive Rail. This pin is
connected to the PD positive rail.
Exposed Pad (Pin 13): Tie to V
OUT
OUT
(Pins 7, 8): Output Voltage Negative Rail. Connects
to V
IN
through an internal power MOSFET. Pins 7
25k
OUT
and features a 14V clamp.
14k
IN
12
11 NC
10
.
9
8
7
GND
4265 BD
PWRGD
PWRGD
V
V
IN
OUT
OUT
and PCB heat sink.
LTC4265
5
4265f