LTC4223 LINER [Linear Technology], LTC4223 Datasheet - Page 14

• Manufacturer Part Number: LTC4223
• Description: Dual Ideal Diode and Hot Swap Controller
• Manufacturer: LINER [Linear Technology]

LTC4228-1/LTC4228-2
applicaTions inForMaTion
Supply Undervoltage Monitor
The ON pin functions as a turn-on control and an input sup-
ply monitor. A resistive divider connected between the input
supply (IN1 or SENSE1
spective ON pin monitors the supply undervoltage condition.
The undervoltage threshold is set by proper selection of the
resistors and is given by:
where V
An undervoltage fault occurs if the input supply falls below
its undervoltage threshold for longer than 20µs. The FAULT
pin will not be pulled low. If the ON pin voltage falls below
1.155V but remains above 0.6V, the Hot Swap MOSFET is
turned off by a 300µA pull-down from HGATE to ground.
The Hot Swap MOSFET turns back on instantly without
the 100ms debounce cycle when the input supply rises
above its undervoltage threshold.
However, if the ON pin voltage drops below 0.6V, it turns
off the Hot Swap MOSFET and clears the associated fault
latches. The Hot Swap MOSFET turns back on only after a
100ms debounce cycle when the input supply is restored
above its undervoltage threshold. An undervoltage fault on
one supply does not affect the operation of the other sup-
ply. The ideal diode function controlled by the ideal diode
MOSFET is unaffected by undervoltage fault conditions.
If both IN supplies fall until the internally generated sup-
ply, INTV
MOSFETs are turned off and the fault latches are cleared.
Operation resumes from a fresh start-up cycle when the
14
20A/DIV
10V/DIV
V
1V/DIV
HGATE
5V/DIV
FAULT
IN(UVTH)
I
LOAD
TMR
ON(TH)
CC
Figure 6. Auto-Retry Sequence After a Fault
, drops below its 2.2V UVLO threshold, all the
= 1+

 
is the ON rising threshold (1.235V).
R
BOTTOM
R
+
, IN2 or SENSE2
TOP
50ms/DIV

 
• V
ON(TH)
+
) and GND at the re-
422812 F06
input supplies are restored and INTV
threshold.
There is a 10µs glitch filter on the ON pin to reject supply
glitches. By placing a filter capacitor, C
tive divider at the ON pin, the glitch filter delay is further
extended by the RC time constant to prevent any false fault.
Power Good Monitor
Internal circuitry monitors the MOSFET gate overdrive
between the HGATE and OUT pins. The power good status
for each supply is reported via its respective open-drain
output, PWRGD1 or PWRGD2. They are normally pulled
high by an external pull-up resistor or the internal 10µA
pull-up. The power good output asserts low when the gate
overdrive exceeds 4.2V during the HGATE start-up. Once
asserted low, the power good status is latched and can only
be cleared by pulling the ON pin low, toggling the EN pin
from low to high, or INTV
The power good output continues to pull low while HGATE
is regulating in active current limit, but pulls high when
the circuit breaker times out and pulls the HGATE pin low.
CPO and DGATE Start-Up
The CPO and DGATE pin voltages are initially pulled up
to a diode below the IN pin when first powered up. CPO
starts ramping up 7µs after INTV
age lockout level. Another 40µs later, DGATE also starts
ramping up with CPO. The CPO ramp rate is determined
by the CPO pull-up current into the combined CPO and
DGATE pin capacitances. An internal clamp limits the CPO
pin voltage to 12V above the IN pin, while the final DGATE
pin voltage is determined by the gate drive amplifier. An
internal 12V clamp limits the DGATE pin voltage above IN.
MOSFET Selection
The LTC4228 drives N-channel MOSFETs to conduct the
load current. The important features of the MOSFETs are
on-resistance, R
age, BV
The gate drive for the ideal diode MOSFET and Hot Swap
MOSFET is guaranteed to be greater than 5V and 4.8V
respectively when the supply voltages at IN1 and IN2 are
between 2.9V and 7V. When the supply voltages at IN1 and
DSS
, and the threshold voltage.
DS(ON)
, the maximum drain-source volt-
CC
entering undervoltage lockout.
CC
CC
clears its undervolt-
exceeds its UVLO
F
, with the resis-
422812f