LTC4065 LINER [Linear Technology], LTC4065 Datasheet - Page 8

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LTC4065

Manufacturer Part Number
LTC4065
Description
High Efficiency Battery Charger/USB Power Manager
Manufacturer
LINER [Linear Technology]
Datasheet

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LTC4088
pin FuncTions
CHRG (Pin 7): Open-Drain Charge Status Output. The
CHRG pin indicates the status of the battery charger. Four
possible states are represented by CHRG: charging, not
charging (or float charge current less than programmed
end of charge indication current), unresponsive battery and
battery temperature out of range. CHRG is modulated at
35kHz and switches between a low and a high duty cycle
for easy recognition by either humans or microprocessors.
CHRG requires a pull-up resistor and/or LED to provide
indication.
GATE (Pin 8): Ideal Diode Amplifier Output. This pin con-
trols the gate of an optional external P-channel MOSFET
transistor used to supplement the internal ideal diode. The
source of the P-channel MOSFET should be connected to
V
BAT (Pin 9): Single Cell Li-Ion Battery Pin. Depending on
available power and load, a Li-Ion battery on BAT will either
deliver system power to V
be charged from the battery charger.
V
controller and input voltage of the battery charger. The
majority of the portable product should be powered from
V
tween the external load on V
charger. Priority is given to the external load and any extra
power is used to charge the battery. An ideal diode from
8
OUT
OUT
OUT
. The LTC4088 will partition the available power be-
(Pin 10): Output voltage of the switching PowerPath
and the drain should be connected to BAT.
OUT
OUT
through the ideal diode or
and the internal battery
BAT to V
exceeds the allotted power from V
source is removed. V
impedance multilayer ceramic capacitor.
V
controller. V
of a computer or a DC output wall adapter. V
be bypassed with a low impedance multilayer ceramic
capacitor.
SW (Pin 12): The SW pin delivers power from V
V
should be connected from SW to V
tions Information section for a discussion of inductance
value and current rating.
D0 (Pin 13): Mode Select Input Pin. D0, in combination
with the D1 pin and the D2 pin, controls the current limit
and battery charger functions of the LTC4088 (see Table 1).
This pin is pulled low by a weak current sink.
D1 (Pin 14): Mode Select Input Pin. D1, in combination
with the D0 pin and the D2 pin, controls the current limit
and battery charger functions of the LTC4088 (see Table 1).
This pin is pulled low by a weak current sink.
Exposed Pad (Pin 15): GND. Must be soldered to the
PCB to provide a low electrical and thermal impedance
connection to ground.
BUS
OUT
(Pin 11): Input voltage for the switching PowerPath
via the step-down switching regulator. An inductor
OUT
BUS
ensures that V
will usually be connected to the USB port
OUT
should be bypassed with a low
OUT
is powered even if the load
BUS
OUT
or if the V
. See the Applica-
BUS
BUS
should
power
BUS
4088fb
to

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