CS4297-KQ Cirrus Logic, CS4297-KQ Datasheet - Page 16

• Manufacturer Part Number: CS4297-KQ
• Description: CrystalClear SoundFusion Audio Codec 97
• Manufacturer: Cirrus Logic

Slot 0: Serial Data Output Slot Tags
The first slot, Slot 0, is a 16-bit slot which contains information about the validity of data for the remaining
12 slots. The 16 bits of this slot are defined as:
Valid Frame - Bit 15 determines if any of the following slots contain valid data. If this bit is ‘set’, at least
one of the other 12 slots contain valid data. If this bit is ‘cleared’, the remainder of the frame will be ig-
nored.
Slot 1 Valid - Bit 14 indicates the validity of data in the serial data output Slot 1. If this bit is ‘set’, Slot 1
contains valid data. If this bit is ‘cleared’, Slot 1 will be ignored.
Slot 2 Valid - Bit 13 indicates the validity of data in the serial data output Slot 2. If this bit is ‘set’, Slot 2
contains valid data. If this bit is ‘cleared’, Slot 2 will be ignored.
Slot 3 Valid - Bit 12 indicates the validity of data in the serial data output Slot 3. If this bit is ‘set’, Slot 3
contains valid data. If this bit is ‘cleared’, Slot 3 will be ignored.
Slot 4 Valid - Bit 11 indicates the validity of data in the serial data output Slot 4. If this bit is ‘set’, Slot 4
contains valid data. If this bit is ‘cleared’, Slot 4 will be ignored.
Slot 0 bits 10 through 0 represent unimplemented data slots in the CS4297 and will be ignored.
The input PCM data to the CS4297 on the SDATA_OUT pin is shifted out MSB justified (most significant
bit of the actual data of the 20-bit slots). In any case where there are less than 20-bits of valid data for a
slot (i.e.: 18-bit PCM data in a 20-bit slot), the trailing bits of the slot must be ‘cleared’ by the AC’97 Con-
troller. For Slots 5 - 12, the AC’97 Controller should ‘clear’ each bit in each frame, however data in these
slots will be ignored.
Slot 1: AC’97 Register Address
Slot 1 indicates the Register Address of the current frame’s register access. The 20 bits of this slot are de-
fined as:
R/W - Bit 19 is the Read/Write bit. When this bit is ‘set’, a read of the AC’97 Register specified by the
Register Index will occur. When the bit is ‘cleared’, a write will occur. In both cases, register accesses only
occur when the Slot Valid bit 14 of Slot 0 (F1) corresponding to Slot 1 is ‘set’.
RI6 - RI0 - Bits 18-12 contain the 7-bit register index to the AC’97 Registers in the CS4297. All registers
are defined at word addressable boundaries. Bit 12 will be saved for historic purposes but is not decoded.
Bits 11-0 are reserved and should always be ‘cleared’ the AC’97 Controller.
Bit 19 18
Frame
Bit 15
R/W
16
F16
Valid
F0
F17
RI6
Slot 1
Valid
F1
14
F18
RI5
17
Slot 2
Valid
F2
13
F19
RI4
16
Slot 3
Valid
F3
12
F20
RI3
15
Slot 4
F21
RI2
Valid
14
F4
11
Table 1. Command Address Port Bit Definition
F22
RI1
13
F5
10
F23
RI0
12
F6
9
F24
11
F7
F25
8
10
F26
9
F8
CrystalClear™ SoundFusion™ Audio Codec ’97
7
F27
8
F9
6
F28
Not Used
7
F10
5
F29
Reserved
6
F11
F30
4
5
F31
F12
4
3
F32
3
F13
2
F33
2
F14
1
F34
CS4297
1
DS242F5
F15
F35
0
0