MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 118

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

6
6.6.1
This register sets the MI BUS delay time. INIT2 may be read at any time but bits 7–4 may be
written only once after reset in normal modes (bits 3, 1 and 0 may be written at any time).
EE[3:0] — EEPROM map position (Refer to Section 3.3.2.3.)
EEPROM is located at $xD00–$xFFF, where x is the hexadecimal digit represented by EE[3:0].
STRX — Stretch extended (Refer to Section 3.3.2.3)
Bit 2 — Not implemented, always read zero.
M2DL1:M2DL0 — MI BUS delay select
These bits are used to set up the delay for the start of the NRZ receive for MI BUS operation as
shown (for a 20kHz bit rate) in the following table.
MOTOROLA
6-8
EEPROM mapping (INIT2)
1 (set)
0 (clear) –
INIT2 — EEPROM mapping and MI BUS delay register
–
All external accesses are extended by one E clock cycle.
Only external access from $0000 to $1FFF (ROMAD set) or from
$C000 to $DFFF (ROMAD clear) are extended by one E clock cycle.
MOTOROLA INTERCONNECT BUS (MI BUS)
(1) 20kHz bit rate requires 25 s (40kHz) time slots.
(2) 25 s 16
Address
$0037
M2DL1
0
0
1
1
bit 7
EE3
M2DL0
0
1
0
1
bit 6
EE2
Delay factor Delay time
bit 5
EE1
1
2
3
4
bit 4
EE0
1.5625 s
3.1250 s
4.6875 s
6.2500 s
STRX
bit 3
(2)
(1)
bit 2
0
M2DL1 M2DL0 0000 0000
bit 1
MC68HC11PH8
bit 0
on reset
State
TPG