DAC0830LCM National Semiconductor, DAC0830LCM Datasheet - Page 12

• Manufacturer Part Number: DAC0830LCM
• Description: 8-Bit P Compatible/ Double-Buffered D to A Converters
• Manufacturer: National Semiconductor

www.national.com
DAC0830 Series Application Hints
2.3 Op Amp Considerations
The op amp used in Figure 7 should have offset voltage null-
ing capability (See Section 2.5).
The selected op amp should have as low a value of input
bias current as possible. The product of the bias current
times the feedback resistance creates an output voltage er-
ror which can be significant in low reference voltage applica-
tions. BI-FET
with these DACs because of their very low input current.
Transient response and settling time of the op amp are im-
portant in fast data throughput applications. The largest sta-
bility problem is the feedback pole created by the feedback
resistance, R
appears from the op amp output to the (−) input and includes
the stray capacitance at this node. Addition of a lead capaci-
tance, C
at the output for a step change in DAC output current.
Finally, the output voltage swing of the amplifier must be
greater than V
age. Depending on the loading on the output of the amplifier
and the available op amp supply voltages (only
many development systems), a reference voltage less than
10 volts may be necessary to obtain the full analog output
voltage range.
2.4 Bipolar Output Voltage with a Fixed Reference
The addition of a second op amp to the previous circuitry can
be used to generate a bipolar output voltage from a fixed ref-
erence voltage. This, in effect, gives sign significance to the
MSB of the digital input word and allows two-quadrant multi-
plication of the reference voltage. The polarity of the refer-
ence can also be reversed to realize full 4-quadrant multipli-
cation:
in Figure 9 .
±
C
V
in Figure 8 , greatly reduces overshoot and ringing
REF
fb
™
x
REF
, and the output capacitance of the DAC. This
±
op amps are highly recommended for use
Digital Code =
to allow reaching the full scale output volt-
±
V
OUT
. This circuit is shown
±
12 volts in
FIGURE 6.
FIGURE 7.
(Continued)
12
This configuration features several improvements over exist-
ing circuits for bipolar outputs with other multiplying DACs.
Only the offset voltage of amplifier 1 has to be nulled to pre-
serve linearity of the DAC. The offset voltage error of the
second op amp (although a constant output voltage error)
has no effect on linearity. It should be nulled only if absolute
output accuracy is required. Finally, the values of the resis-
tors around the second amplifier do not have to match the in-
ternal DAC resistors, they need only to match and tempera-
ture track each other. A thin film 4-resistor network available
from Beckman Instruments, Inc. (part no. 694-3-R10K-D) is
ideally suited for this application. These resistors are
matched to 0.1% and exhibit only 5 ppm/˚C resistance track-
ing temperature coefficient. Two of the four available 10 k
resistors can be paralleled to form R in Figure 9 and the
other two can be used independently as the resistances la-
beled 2R.
2.5 Zero Adjustment
For accurate conversions, the input offset voltage of the out-
put amplifier must always be nulled. Amplifier offset errors
create an overall degradation of DAC linearity.
The fundamental purpose of zeroing is to make the voltage
appearing at the DAC outputs as near 0V
This is accomplished for the typical DAC — op amp connec-
tion ( Figure 7 ) by shorting out R
sistor, and adjusting the V
amp until the output reads zero volts. This is done, of course,
with an applied digital code of all zeros if I
op amp (all one’s for I
moved and the converter is zero adjusted.
OUT2
OS
). The short around R
DS005608-37
nulling potentiometer of the op
DS005608-38
fb
, the amplifier feedback re-
OUT1
DC
is driving the
as possible.
fb
is then re-