X9271 Xicor, X9271 Datasheet - Page 8

• Manufacturer Part Number: X9271
• Description: Single Digitally-Controlled (XDCP) Potentiometer
• Manufacturer: Xicor

X9271
Table 5. Instruction Byte Format
DEVICE DESCRIPTION
Instructions
Five of the eight instructions are three bytes in length.
These instructions are:
– Read Wiper Counter Register – read the current
– Write Wiper Counter Register – change current
– Read Data Register – read the contents of the
– Write Data Register – write a new value to the
– Read Status - This command returns the contents of
The basic sequence of the three byte instructions is
illustrated in Figure 3. These three-byte instructions
exchange data between the WCR and one of the Data
Registers. A transfer from a Data Register to a WCR is
essentially a write to a static RAM, with the static RAM
controlling the wiper position. The response of the
wiper to this action will be delayed by t
from the WCR (current wiper position), to a Data
Register is a write to nonvolatile memory and takes a
minimum of t
between one of the four potentiometers and one of its
associated registers; or it may occur globally, where
the transfer occurs between all potentiometers and one
associated
instruction is the only unique format (see Figure 4).
REV 1.1.7 2/6/03
wiper position of the potentiometer;
wiper position of the potentiometer;
selected Data Register;
selected Data Register.
the WIP bit which indicates if the internal write cycle
is in progress.
(MSB)
I3
register. The
WR
Instruction Opcode
I2
to complete. The transfer can occur
I1
Read
Status
WRL
P0
. A transfer
Register
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RB
Register Selection
Two instructions require a two-byte sequence to
complete (Figure 2). These instructions transfer data
between the host and the X9271; either between the
host and one of the data registers or directly between
the host and the Wiper Counter Register. These
instructions are:
– XFR Data Register to Wiper Counter Register –
– XFR Wiper Counter Register to Data Register –
The final command is Increment/Decrement (Figure 5
and 6). It is different from the other commands,
because it’s length is indeterminate. Once the
command is issued, the master can clock the selected
wiper up and/or down in one resistor segment steps;
thereby, providing a fine tuning capability to the host.
For each SCK clock pulse (t
selected wiper will move one resistor segment towards
the R
while SI is LOW, the selected wiper will move one
resistor segment towards the R
See Instruction format for more details.
Write in Process (WIP bit)
The contents of the Data Registers are saved to
nonvolatile memory when the CS pin goes from LOW
to HIGH after a complete write sequence is received by
the device. The progress of this internal write operation
can be monitored by a Write In Process bit (WIP). The
WIP bit is read with a Read Status command.
This transfers the contents of one specified Data
Register to the associated Wiper Counter Register.
This transfers the contents of the specified Wiper
Counter Register to the specified associated Data
Register.
RA
H
terminal. Similarly, for each SCK clock pulse
P1 and P0 are used also for register Bank Selection
for SPI Register Write and Read operations
P1
Characteristics subject to change without notice.
Pot Selection (WCR Selection)
Set to P0=0 for potentiometer operations
(LSB)
P0
HIGH
L
) while SI is HIGH, the
terminal.
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