X9400 Xicor, X9400 Datasheet - Page 5

• Manufacturer Part Number: X9400
• Description: Quad Digitally Controlled Potentiometers (XDCP)
• Manufacturer: Xicor

X9400
Figure 3. Instruction Byte Format
The four high order bits of the instruction byte specify
the operation. The next two bits (R
of the four registers that is to be acted upon when a
register oriented instruction is issued. The last two bits
(P1
potentiometers is to be affected by the instruction.
Four of the ten instructions are two bytes in length and
end with the transmission of the instruction byte. These
instructions are:
– XFR Data Register to Wiper Counter Register—This
– XFR Wiper Counter Register to Data Register —This
– Global XFR Data Register to Wiper Counter Register —
– Global XFR Wiper Counter Register to Data Register —
The basic sequence of the two byte instructions is
illustrated in Figure 4. These two-byte instructions
exchange data between the WCR and one of the data
registers. A transfer from a Data Register to a WCR is
essentially a write to a static RAM, with the static RAM
controlling the wiper position. The response of the wiper
to this action will be delayed by t
the WCR (current wiper position), to a data register is a
write to nonvolatile memory and takes a minimum of
REV 1.1.4 10/11/02
transfers the contents of one specified Data Register
to the associated Wiper Counter Register.
transfers the contents of the specified Wiper Counter
Register to the specified associated Data Register.
This transfers the contents of all specified Data
Registers to the associated Wiper Counter Registers.
This transfers the contents of all Wiper Counter
Registers to the specified associated Data Registers.
and
I3
P
Instructions
0
I2
)
selects
I1
I0
which
Register
R1
Select
WRL
R0
1
one
and R
. A transfer from
Pot Select
P1
of
0
) select one
P0
the
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four
t
the four potentiometers and one of its associated
registers; or it may occur globally, where the transfer
occurs between all potentiometers and one associated
register.
Five instructions require a three-byte sequence to
complete. These instructions transfer data between the
host and the X9400; either between the host and one of
the data registers or directly between the host and the
Wiper Counter Register. These instructions are:
– Read Wiper Counter Register—read the current
– Write Wiper Counter Register—change current wiper
– Read Data Register—read the contents of the
– Write Data Register—write a new value to the
– Read Status—This command returns the contents of
The sequence of these operations is shown in Figure 5
and Figure 6.
The final command is Increment/Decrement. It is
different from the other commands, because it’s length is
indeterminate. Once the command is issued, the master
can clock the selected wiper up and/or down in one
resistor segment steps; thereby, providing a fine tuning
capability to the host. For each SCK clock pulse (t
while SI is HIGH, the selected wiper will move one
resistor segment towards the V
for each SCK clock pulse while SI is LOW, the selected
wiper will move one resistor segment towards the V
terminal. A detailed illustration of the sequence and
timing for this operation are shown in Figure 7 and Figure
8.
WR
wiper position of the selected pot,
position of the selected pot,
selected data register;
selected data register.
the WIP bit which indicates if the internal write cycle
is in progress.
to complete. The transfer can occur between one of
Characteristics subject to change without notice.
H
/R
H
terminal. Similarly,
5 of 22
HIGH
L
/R
L
)