M48T08 ST Microelectronics, M48T08 Datasheet - Page 11

• Manufacturer Part Number: M48T08
• Description: 64 Kbit 8Kb x 8 TIMEKEEPER SRAM
• Manufacturer: ST Microelectronics

actually be completely discharged. The two effects
are virtually unrelated, allowing discharge or Ca-
pacity Consumption, and the effects of aging or
Storage Life, to be treated as two independent but
simultaneous mechanisms. The earlier occurring
failure mechanism defines the battery system life
of the M48T08/18.
Cell Storage Life
Storage life is primarily a function of temperature.
Figure 9 illustrates the approximate storage life of
the M48T08/18 battery over temperature. The re-
sults in Figure 9 are derived from temperature
accelerated life test studies performed at SGS-
THOMSON. For the purpose of the testing, a cell
failure is defined as the inability of a cell stabilized
at 25 C to produce a 2.4V closed circuit voltage
across a 250 k
and t
tions for the cell’s storage life. At 70 C, for example,
the t
chance of having a battery failure 11 years into its
life while the t
of failure at the 20 year mark. The t
sents the practical onset of wear out and can be
considered the worst case Storage Life for the cell.
The t
life.
Calculating Storage Life
The following formula can be used to predict stor-
age life:
where,
– TA1, TA2, TAN = time at ambient temperature
– TT = total time = TA1+TA2+...+TAN
– SL1, SL2, SLN = storage life at temperature 1,
For example, an M48T08/18 is exposed to tem-
peratures of 55 C or less for 8322 hrs/yr, and
temperatures greater than 60 C but less than 70 C
for the remaining 438 hrs/yr. Reading predicted t
values from Figure 9,
– SL1 = 41 yrs, SL2 = 11.4 yrs
– TT = 8760 hrs/yr
– TA1 = 8322 hrs/yr, TA2 = 438 hrs/yr
Predicted storage life
or 36 years.
Cell Capacity Life
The M48T08/18 internal cell has a rated capacity
of 50mAh. The device places a nominal RAM and
TIMEKEEPER load of less than 520nA on the
{[(TA1/TT)/SL1]+[(TA2/TT)/SL2]+...+[(TAN/TT)/SLN]}
1, 2, etc.
2, etc.
1%
50%
50%
line indicates that an M48T08/18 has a 1%
, represent different failure rate distribu-
can be considered the normal or average
{[(8322/8760)/41]+[(431/8760)/11.4]}
50%
shows the part has a 50% chance
load resistor. The two lines, t
1
1
1%
line repre-
1%
1%
battery at room temperature. At this rate, the ca-
pacity consumption life is 50E-3/520E-9 = 96,153
hours or about 11 years. Capacity consumption life
can be extended by applying V
clock oscillator prior to system power down.
Calculating Capacity Life
The RAM and TIMEKEEPER load remains rela-
tively constant over the operating temperature
range. Thus, worst case cell capacity life is essen-
tially a function of one variable, V
example, if the oscillator runs 100% of the time with
V
sumption life is 10/(1-0.6), or 25 years.
Estimated System Life
Since either storage life or capacity consumption
can end the battery’s life, the system life is marked
by which ever occurs first. In the above example,
this would be 25 years.
Reference for System Life
Each M48T08/18 is marked with a nine digit manu-
facturing date code in the form of H99XXYYZZ. For
example, H995B9431 is:
H = fabricated in Carrollton, TX
9 = assembled in Muar, Malaysia,
9 = tested in Muar, Malaysia,
5B = lot designator,
9431 = assembled in the year 1994, work week 31.
CLOCK OPERATIONS
Reading the Clock
Updates to the TIMEKEEPER registers should be
halted before clock data is read to prevent reading
data in transition. Because the BiPORT TIME-
KEEPER cells in the RAM array are only data
registers, and not the actual clock counters, updat-
ing the registers can be halted without disturbing
the clock itself.
Updating is halted when a ’1’ is written to the READ
bit, the seventh bit in the control register. As long
as a ’1’ remains in that position, updating is halted.
After a halt is issued, the registers reflect the count;
that is, the day, date, and the time that were current
at the moment the halt command was issued.
All of the TIMEKEEPER registers are updated si-
multaneously. A halt will not interrupt an update in
progress. Updating is within a second after the bit
is reset to a ’0’.
Setting the Clock
The eighth bit of the control register is the WRITE
bit. Setting the WRITE bit to a ’1’, like the READ bit,
halts updates to the TIMEKEEPER registers. The
user can then load them with the correct day, date,
and time data in 24 hour BCD format (on Table 11).
CC
applied 60% of the time, the capacity con-
M48T08, M48T18
CC
CC
or turning off the
duty cycle. For
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