IDT71T75602 Integrated Device Technology, IDT71T75602 Datasheet - Page 4

• Manufacturer Part Number: IDT71T75602
• Description: 512K x 36/ 1M x 18 2.5V Synchronous ZBT SRAMs 2.5V I/O/ Burst Counter Pipelined Outputs
• Manufacturer: Integrated Device Technology

NOTE:
1. V
IDT71T75602, IDT71T75802, 512K x 36, 1M x 18, 2.5V Synchronous ZBT™ SRAMs with
2.5V I/O, Burst Counter, and Pipelined Outputs
Symbol
V
V
V
V
V
V
DDQ
DD
SS
IL
IH
IH
IL
(min.) = –0.8V for pulse width less than t
Core Supply Voltage
I/O Supply Voltage
Ground
Input High Voltage - Inputs
Input High Voltage - I/O
Input Low Voltage
Parameter
NOTES:
1. Pins 14, 16, and 66 do not have to be connected directly to V
2. Pins 38, 39 and 43 will be pulled internally to V
3. Pin 43 is reserved for the 36M address. JTAG is not offered in the 100-pin TQFP package for the 36M ZBT device.
V
V
interfering with normal operation, several settings are possible. Pins 38, 39 and 43 could be tied to V
42 should be left unconnected. Or all JTAG inputs (TMS, TDI and TCK) pins 38, 39 and 43 could be left unconnected
“NC” and the JTAG circuit will remain disabled from power up.
V
V
V
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DD
DD
V
DDQ
V
V
DDQ
V
DDQ
V
V
DDQ
DD
SS
SS
SS
SS
SS
P3
P4
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
(1)
(1)
2.375
2.375
-0.3
Min.
1.7
1.7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
0
(1)
CYC
100 99 98 97 96 95 94 93 92 91 90
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
/2, once per cycle.
Typ.
2.5
2.5
____
____
____
0
V
V
DDQ
DD
2.625
2.625
Max.
0.7
0
+0.3
+0.3
5313 tbl 03
Unit
V
V
V
V
V
V
6.42
4
DD
NOTE:
1. During production testing, the case temperature equals the ambient temperature.
if not actively driven. To disable the TAP controller without
89 88
Commercial
Industrial
Grade
87 86 85 84 83 82 81
DD
as long as the input voltage is
Commercial and Industrial Temperature Ranges
-40° C to +85° C
0° C to +70° C
Temperature
Ambient
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
(1)
5313 drw 02
I/O
I/O
V
I/O
I/O
I/O
I/O
I/O
I/O
V
V
V
V
I/O
I/O
I/O
I/O
V
V
V
V
ZZ
I/O
I/O
V
V
I/O
I/O
I/O
I/O
SS
DD
DD
DDQ
SS
DDQ
SS
DDQ
SS
SS
DDQ
15
V
14
13
12
11
10
9
8
5
4
3
2
7
6
1
0
P1
OV
OV
P2
(1)
SS
V
,
2.5V ± 5%
2.5V ± 5%
IH
DD
.
V
or V
DD
SS
and pin
2.5V ± 5%
2.5V ± 5%
V
DDQ
5313 tbl 05