74HC109 Philips, 74HC109 Datasheet
74HC109
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74HC109 Summary of contents
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DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT109 Dual JK flip-flop with set and reset; positive-edge trigger Product specification ...
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... Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger FEATURES J, K inputs for easy D-type flip-flop Toggle flip-flop or “do nothing” mode Output capability: standard I category: flip-flops CC GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL) ...
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... Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger PIN DESCRIPTION PIN NO. SYMBOL 14 1J, 2J, 1K 1CP, 2CP 1Q 1Q GND Fig.1 Pin configuration. 1997 Nov 25 NAME AND FUNCTION , 2R asynchronous reset-direct input (active LOW) ...
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... Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger Fig.4 Functional diagram. handbook, full pagewidth Fig.5 Logic diagram (one flip-flop). PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines” 1997 Nov 25 FUNCTION TABLE OPERATING MODE S D asynchronous set ...
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... Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” Output capability: standard I category: flip-flops CC AC CHARACTERISTICS FOR 74HC GND = ns SYMBOL PARAMETER ...
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... Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” Output capability: standard I category: flip-flops CC AC CHARACTERISTICS FOR 74HCT GND = ns SYMBOL PARAMETER ...
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... Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger AC WAVEFORMS The shaded areas indicate when the input is permitted to change for predictable output performance. Fig.6 Waveforms showing the clock (nCP) to output (nQ, nQ) propagation delays, the clock pulse width, the nJ nCP set-up, the nCP to nJ, nK hold times, the output transition times and the maximum clock pulse frequency ...
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... Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities ...
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... These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. ...