AD7476ART Analog Devices, AD7476ART Datasheet - Page 4

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AD7476ART

Manufacturer Part Number
AD7476ART
Description
1 MSPS/ 12-/10-/8-Bit ADCs in 6-Lead SOT-23
Manufacturer
Analog Devices
Datasheet

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AD7478–SPECIFICATIONS
Parameter
DYNAMIC PERFORMANCE
DC ACCURACY
ANALOG INPUT
LOGIC INPUTS
LOGIC OUTPUTS
CONVERSION RATE
POWER REQUIREMENTS
NOTES
1
2
3
4
5
Specifications subject to change without notice.
AD7476/AD7477/AD7478
Temperature ranges as follows: A Version: –40°C to +85°C.
Operational from V
See Terminology.
Sample tested at 25°C to ensure compliance.
See Power Versus Throughput Rate section.
Signal-to-Noise + Distortion (SINAD)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise (SFDR)
Intermodulation Distortion (IMD)
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Total Unadjusted Error (TUE)
Input Voltage Ranges
DC Leakage Current
Input Capacitance
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Current, I
Input Capacitance, C
Output High Voltage, V
Output Low Voltage, V
Floating-State Leakage Current
Floating-State Output Capacitance
Output Coding
Conversion Time
Track/Hold Acquisition Time
Throughput Rate
V
I
Power Dissipation
DD
DD
Second Order Terms
Third Order Terms
Normal Mode (Static)
Normal Mode (Operational)
Full Power-Down Mode
Normal Mode (Operational)
Full Power-Down
DD
= 2.0 V, with input high voltage, V
IN
IN
, SCLK Pin
, CS Pin
5
IN
INL
INH
3, 4
OL
OH
3, 4
INH
= 1.8 V min.
A Version
49
–65
–65
–68
–68
10
30
6.5
8
± 0.5
± 0.5
± 0.5
± 0.5
± 0.5
0 to V
± 1
30
2.4
0.8
0.4
± 1
± 1
10
V
0.4
± 10
10
800
400
1
2.7/5.25
2
1
3.5
1.6
1
80
17.5
4.8
5
Straight (Natural) Binary
1
DD
(V
– 0.2
DD
DD
= 2.7 V to 5.25 V, f
1, 2
Unit
dB min
dB max
dB max
dB typ
dB typ
ns max
ps typ
MHz typ
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
V
µA max
pF typ
V min
V max
V max
µA max
µA typ
pF max
V min
V max
µA max
pF max
ns max
ns max
MSPS max
V min/max
mA typ
mA typ
mA max
mA max
µA max
µA max
mW max
mW max
µW max
SCLK
= 20 MHz, T
A
Test Conditions/Comments
f
fa = 498.7 kHz, fb = 508.7 kHz
fa = 498.7 kHz, fb = 508.7 kHz
Guaranteed No Missed Codes to 8 Bits
V
V
Typically 10 nA, V
I
I
16 SCLK Cycles with SCLK at 20 MHz
Conversion Time + Quiet Time
Digital I/Ps = 0 V or V
V
V
V
V
SCLK Off
SCLK On
V
V
V
@ 3 dB
= T
IN
SOURCE
SINK
DD
DD
DD
DD
DD
DD
DD
DD
DD
= 100 kHz Sine Wave, f
MIN
= 5 V
= 3 V
= 4.75 V to 5.25 V. SCLK On or Off
= 2.7 V to 3.6 V. SCLK On or Off
= 4.75 V to 5.25 V. f
= 2.7 V to 3.6 V. f
= 5 V. f
= 3 V. f
= 5 V. SCLK Off
= 200 µA
to T
= 200 µA; V
MAX
, unless otherwise noted.)
SAMPLE
SAMPLE
IN
= 1 MSPS
= 1 MSPS
DD
= 0 V or V
DD
SAMPLE
= 2.7 V to 5.25 V
SAMPLE
SAMPLE
= 1 MSPS
DD
= 1 MSPS
= 1 MSPS

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