SL34118D System Logic Semiconductor, SL34118D Datasheet - Page 7

• Manufacturer Part Number: SL34118D
• Description: Voice Switched Speakerphone Circuit
• Manufacturer: System Logic Semiconductor

roll off the high and frequencies in the receive circuit,
which aids protecting against acoustic feedback
problems. With an appropriate choice of an input
coupling capacitor to the low pass filter, a band pass
filter is formed.
POWER
DISABLE
between 3.5 and 6.5 volts for normal operation, with
reduced operation possible down to 2.8 volts.
PIN DESCRIPTION
PIN DESCRIPTION
Pin No
SLS
As a low pass filter (Figure 7), it can be used to
The power supply voltage at V
10
11
1
2
3
4
5
6
7
8
9
System Logic
Semiconductor
Designation
Figure 7. Low Pass Filter
SUPPLY,
HTO+
HTO-
MCO
TXO
MCI
HTI
TXI
CD
V
FO
FI
CC
Filter output. Output impedance is less than 50 .
Filter input. Input impedance is greater than 1.0 M .
Chip Disable. A logic low (<0.8 V) sets normal operation. A logic high (>2.0 V)
disables the IC to conserve power. Input impedance is nominally 90 K .
A supply voltage of +2.8 to +6.5 Volts is required, at 5.0 mA. As V
to 2.8 Volts, an AGC circuit reduces the receive attenuator gain by 25 dB (when in
the receive mode).
Output of the second hybrid amplifier. The gain is internally set at -1.0 to provide a
differential output, in conjunction with HTO-, to the hybrid transformer.
Output of the first hybrid amplifier. The gain of the amp is set by external resistors.
Input and summing node for the first hybrid amplifier. DC level is V
Output of the transmit attenuator. DC level is approximately V
Input to the transmit attenuator. Max. signal level is 350 mVrms. Input impedance is
Output of the microphone amplifier. The gain of the amplifier is set by external
resistors.
Input and summing node of the microphone amplifier. DC level is V
V
10 K .
B
,
CC
AND
(Pin 4) is to be
CHIP
The output voltage at V
provides the ac ground for the system. The output
impedance at V
the external capacitor at V
power supply rejection.
amplifiers, the amount of supply rejection at their
outputs is directly related to the rejection at V
well as their respective gains.
the IC to conserve power and/or for muting purposes.
With CD 0.8 volts, normal operation is in effect. With
CD 2.0 volts and
the powered down mode, the microphone and the
hybrid amplifiers are disabled, and their outputs go to
a high impedance state. Additionally, the bias is
removed from the filter (Pins 1, 2), the attenuators
(Pins 8, 9, 21, 22), or from Pins 13, 14, and 15 (the
attenuators are disabled, however, and will not pass a
signal). The input impedance at CD is typically 90 k ,
has a threshold of 1.5 volts, and the voltage at this
pin must be kept within the range of ground and V
If CD is not used, the pin should be grounded.
Since V
The Chip Disable (Pin 3) permits powering down
Description
B
biases
B
is 400 , and in conjunction with
V
CC
the microphone and hybrid
, the IC is powered down. In
B
(Pin 15) is (V
B
, forms a low pass filter for
B
.
B.
B
CC
SL34118
.
CC
falls from 3.5
- 0.7)/2, and
(continued)
B
, as
CC
.