LTC3785 LINER [Linear Technology], LTC3785 Datasheet - Page 23

• Manufacturer Part Number: LTC3785
• Description: High Efficiency, Synchronous, 4-Switch Buck-Boost Controller
• Manufacturer: LINER [Linear Technology]

applicaTions inForMaTion
The Vishay SiR422DP has a typical R
T
The maximum dissipation in QB occurs at maximum input
voltage when the circuit is operating in the buck region.
The dissipation is:
This seems to indicate that a quite small MOSFET can be
used for QB if we only look at power loss. However, with
5A current the voltage drop across 0.156Ω is 0.78V, which
means the MOSFET body diode is conducting. To avoid body
diode current flow we should keep the maximum voltage
drop well below 0.5V, using, for example, Vishay Si4840BDY
in the SO-8 package (R
Select QC and QD. With 12V output voltage we need
MOSFETs with 20V or higher rating.
The highest dissipation occurs at minimum input voltage
when the inductor current is highest. For switch QC the
dissipation is:
where C
ers. The constant k, which accounts for the loss caused by
reverse recovery current, is inversely proportional to the
gate drive current and has an empirical value of 1.7.
P
R
J
B,BUCK
DS(ON)
= 125°C and V
P
+ k • V
• I
C,BOOST
OUT(MAX)
RSS
(125°C) <
=
OUT
is usually specified by the MOSFET manufactur-
V
=
IN
3
2
− V
(V
V
IN
GS
OUT
•
• ρ
OUT
18V TO −12V
= 4.5V.
I
OUT(MAX)
t
− V
V
DSON(MAX)
IN
• R
• I
V
IN
18V
IN
OUT(MAX)
2
)V
DS(ON)
1.3W
OUT
• C
= 0.012Ω).
RSS
2
• (5A)
• ρ
DS(ON)
• f
t
• R
2
of 0.010Ω at
DS(ON)
= 0.156Ω
The dissipation in switch QD is:
Vishay SiR484OY is a possible choice for QC and QD. The
calculated power loss at 5V input voltage is then 1.3W for
QC and 0.84W for QD.
C
In this mode, the maximum input current peak is:
A low ESR (10mΩ) capacitor is selected. Input voltage
ripple is 57mV (assuming ESR dominates the ripple).
C
region. In this mode, the maximum output current peak is:
A low ESR (5mΩ) capacitor is suggested. This capacitor
will limit output voltage ripple to 53mV (assuming ESR
dominates the ripple).
PC Board Layout Checklist
The basic PC board layout requires a dedicated ground
plane layer. Also, for high current, a multilayer board
provides heat sinking for power components.
• The ground plane layer should not have any traces and
• Place C
• Use immediate vias to connect the components (in-
IN
OUT
should be as close as possible to the layer with power
MOSFETs.
pact area. Place C
one compact area. One layout example is shown in
Figure 12.
cluding the LTC3789’s SGND and PGND pins) to the
ground plane. Use several large vias for each power
component.
I
I
P
IN,PEAK(MAX,BUCK)
OUT,PEAK(MAX,BOOST)
is chosen to filter the square current in the buck region.
• ρ
D,BOOST
is chosen to filter the square current in the boost
t
• R
IN
, switch A, switch B and D1 in one com-
DS(ON)
=
V
V
OUT
IN
OUT
= 5A • 1+
•
=
, switch C, switch D and D2 in

 
12
5
V
V
OUT
IN
• 5 • 1+

 
• I



29%
OUT(MAX)
2
LTC3789
11%

 
2
= 5.7A

 = 10.6A


 
2
23
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