LTC3773EG-PBF LINER [Linear Technology], LTC3773EG-PBF Datasheet - Page 4

• Manufacturer Part Number: LTC3773EG-PBF
• Description: Triple Output Synchronous 3-Phase DC/DC Controller with Up/Down Tracking
• Manufacturer: LINER [Linear Technology]

ELECTRICAL CHARACTERISTICS
LTC3773
operating temperature range, otherwise specifi cations are at T
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3773 is guaranteed to meet performance specifi cations
from 0°C to 85°C. Specifi cations over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. T
temperature T
formula.
4
SYMBOL
Power Good Output Indication
V
I
V
V
V
Oscillator and Phase-Locked Loop
f
f
f
f
f
V
V
V
V
I
P
CLKOUT
PGOOD
NOM
LOW
HIGH
PLLLOW
PLLHIGH
PLLFLTR
PGL
PGTHNEG
PGTHPOS
PGDLY
LO
FLOAT
HI
PLLIN
RELPHS
LTC3773EG: T
LTC3773EUHF: T
A
and power dissipation P
J
= T
J
PARAMETER
PGOOD Voltage Output Low
PGOOD Output Leakage
PGOOD Trip Thresholds
V
V
PGOOD Delay
Nominal Frequency
Low Frequency
High Frequency
PLLIN Minimum Input Frequency
PLLIN Maximum Input Frequency
PLLIN/FC, PHASEMD, PLLFLTR
Logic Input
Low Level Input Voltage
Floating Voltage
High Level Input Voltage
PLLIN Synchronization Input Threshold
Phase Detector Output Current
Controller 2 - Controller 1 Phase
Controller 3 - Controller 1 Phase
Controller 2 - Controller 1 Phase
Controller 3 - Controller 1 Phase
Controller 1 TG to CLKOUT Phase
= T
A
FB
FB
Sinking Capability
Sourcing Capability
+ (P
A
Ramping Negative
Ramping Positive
+ (P
D
x 95°C/W)
D
x 34°C/W)
J
is calculated from the ambient
D
according to the following
CONDITIONS
I
V
V
PGOOD Goes Low After V
V
V
V
V
f
f
PHASEMD Floats or V
V
PHASEMD Floats
V
V
PGOOD
PLLIN
PLLIN
PGOOD
FB
PLLFLTR
PLLFLTR
PLLFLTR
PLLFLTR
PHASEMD
PHASEMD
PHASEMD
(Note 3) The
with Respect to 0.6V Reference
< f
> f
A
= 2mA
= 5V
OSC
OSC
= 25°C. V
Open
= 0V
= 5V
= 1.5V
= 5V
= 0V
= 5V
Note 3: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specifi ed.
Note 4: The IC is tested in a feedback loop that adjusts V
specifi ed error amplifi er output voltage (V
Note 5: Guaranteed by design, not subject to test.
Note 6: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 7: R
test.
Note 8: The minimum on-time condition corresponds to an inductor
peak-to-peak ripple current of ≥40% of I
considerations in the Applications Information section).
●
CC
denotes the specifi cations which apply over the full
PHASEMD
= V
DS(ON)
PGDLY
DR
= V
= 0V
Delay
limit is guaranteed by design and/or correlation to static
BOOST
= V
SDB
= 5V, unless otherwise noted.
MIN
100
360
190
510
540
–7
MAX
7
ITH
).
(see minimum on-time
TYP
–10
150
400
220
560
160
700
–25
120
240
270
180
0.1
1.0
1.6
3.0
10
25
90
60
1
0
FB
MAX
–13
440
250
630
200
0.3
to achieve a
13
1
UNITS
3773fb
Deg
Deg
Deg
Deg
Deg
Deg
Deg
kHz
kHz
kHz
kHz
kHz
μA
μA
μA
μs
%
%
V
V
V
V
V