LTC3773EG-PBF LINER [Linear Technology], LTC3773EG-PBF Datasheet - Page 19

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LTC3773EG-PBF

Manufacturer Part Number
LTC3773EG-PBF
Description
Triple Output Synchronous 3-Phase DC/DC Controller with Up/Down Tracking
Manufacturer
LINER [Linear Technology]
Datasheet
APPLICATIONS INFORMATION
age output current I
the peak-to-peak ripple current, ΔI
Allowing a margin for variations in the IC and external
component values yields:
The IC works well with values of R
0.1Ω.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant fre-
quency architectures by preventing subharmonic oscilla-
tions at duty cycles greater than 50%. It is accomplished
internally by adding a compensating ramp to the inductor
current signal at duty cycles in excess of 40%. Normally,
at the maximum duty cycle, with slope compensation, the
maximum inductor peak current is reduced by more than
50%, reducing the maximum output current at high duty
cycle operation. However, the LTC3773’s slope compensa-
tion recovery is implemented to allow 70% rated inductor
peak current at the maximum duty cycle.
V
Power for the top and bottom MOSFET drivers is derived
from the V
from the V
total current consumption at these two pins should be well
below 100mA. Hence, V
external auxiliary 5V power supply. If an auxiliary supply is
not available, a simple zener diode and a darlington NPN
buffer can be used to power these two pins as shown in
Figure 3. To prevent switching noise from coupling to the
sensitive analog control circuitry, V
bypass capacitor, at least, close to the device. The BiCMOS
process that allows the LTC3773 to include large on-chip
MOSFET drivers also limits the maximum V
voltage to 7V. This limits the practical maximum auxiliary
supply to a loosely regulated 7V rail. If V
3.9V, LTC3773 goes into undervoltage lockout; if V
drops below V
disabled.
CC
R
and V
SENSE
DR
DR
CC
=
pin; the internal controller circuitry is derived
55mV
Power Supplies
pin. Under typical operating conditions, the
I
MAX
CC
by more than 1V, the driver outputs are
MAX
DR
equal to the peak value less half
and V
CC
can be connected to an
SENSE
L
CC
.
should have a 1μF
from 0.002Ω to
CC
drops below
DR
and V
DR
CC
Topside MOSFET Driver Supply (C
External bootstrap capacitors, C
BOOST pins, supply the gate drive voltages for the topside
MOSFETs. Capacitor C
D
MOSFETs turns on, the driver places the C
the gate-source of the desired MOSFET. This enhances
the MOSFET and turns on the topside switch. The switch
node voltage, SW, rises to V
With the topside MOSFET on, the boost voltage is above
the input supply (V
boost capacitor C
total gate charge capacitance of the topside MOSFET(s)
as specifi ed on the manufacturer’s data sheet. The reverse
breakdown of D
Regulator Output Voltage
The regulator output voltages are each set by an external
feedback resistive divider carefully placed across the output
capacitor. The resultant feedback signal is compared with
the internal precision 0.6V voltage reference by the error
amplifi er. The output voltage is given by the equation:
where R1 and R2 are defi ned in Figure 1.
B
Q1: ZETEX FZT603
V
Z
R
2k
100Ω
: ON SEMI MM5Z6V8ST1
V
from V
V
6.8V
Z
Z
OUT
= 0.6V 1+
Figure 3. LTC3773 V
DR
Q1
when the SW pin is low. When the topside
+
B
B
V
must be greater than V
C
OUT
C
OUT
needs to be 30 to 100 times that of the
IN
BOOST
R2
R1
+
B
in Figure 3 is charged though diode
R
10Ω
SENSE
D
B
= V
CC
IN
and V
DR
and the BOOST pin follows.
10μF
10μF
L
D1
QT
+ V
DR
+
+
B
B
Power Supplies
, connected to the
IN
, D
V
QB
). The value of the
IN
LTC3773
B
0.1μF
0.1μF
)
B
IN(MAX)
C
B
voltage across
BOOST
TG
SW
BG
V
PGND
V
.
DR
CC
19
LTC3773
SGND
3773fb
3773 F03

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