LTC2754 LINER [Linear Technology], LTC2754 Datasheet - Page 8

• Manufacturer Part Number: LTC2754
• Description: Quad 12-/16-Bit SoftSpan IOUT DACs
• Manufacturer: LINER [Linear Technology]

PIN FUNCTIONS
LTC2754
GE
pin can be used to null gain error or to compensate for
reference errors. Nominal adjustment range is ±512 LSB
(LTC2754-16) for a voltage input range of ±V
for a 5V reference input). Tie to ground if not used.
R
Amplifi er. The 20k input resistor is connected internally
from R
external reference voltage V
Any or all of these precision-matched resistor sets (Each
set comprising R
invert one or more positive reference voltages to the nega-
tive voltages needed by the DACs. Typically 5V; accepts
up to ±15V.
I
I
GND (Pin 4): Ground; provides shielding for I
to ground.
CS/LD (Pin 5): Synchronous Chip Select and Load Pin.
SDI (Pin 6): Serial Data Input. Data is clocked in on the
rising edge of the serial clock (SCK) when CS/LD is low.
SCK (Pin 7): Serial Clock.
SRO (Pin 8): Serial Readback Output. Data is clocked out
on the falling edge of SCK. Readback data begins clocking
out after the last address bit A0 is clocked in. SRO is an
active output only when the chip is selected (i.e., when
CS/LD is low). Otherwise SRO presents a high-impedance
output in order to allow other parts to control the bus.
SROGND (Pin 9): Ground pin for SRO. Tie to ground.
V
pass with a 0.1μF low-ESR ceramic capacitor to ground.
GND (Pin 11): Ground. Tie to ground.
I
I
R
Amplifi er. The 20k input resistor is connected inter-
nally from R
to the external reference voltage V
8
OUT2A
OUT2A
OUT2D
OUT2D
DD
INA
IND
ADJA
(Pin 10): Positive Supply Input; 2.7V ≤ V
(Pin 2): Input Resistor for Reference Inverting
(Pin 13): Input Resistor for Reference Inverting
INA
to ground.
(Pin 3): DAC A Current Output Complement. Tie
(Pin 12): DAC D Current Output Complement. Tie
to ground.
(Pin1): Gain Adjust Pin for DAC A. This control
to R
IND
COMA
to R
INX
. For normal operation tie R
, R
COMD
COMX
. For normal operation tie R
REFA
and REFX) may be used to
(see Typical Applications).
REFD
RINA
DD
(see Typical
≤ 5.5V. By-
OUT2A
INA
(i.e., ±5V
to the
. Tie
IND
Applications). Any or all of these precision-matched resis-
tor sets (Each set comprising R
be used to invert one or more positive reference voltages
to the negative voltages needed by the DACs. Typically
5V; accepts up to ±15V.
GE
pin can be used to null gain error or to compensate for
reference errors. Nominal adjustment range is ±512 LSB
(LTC2754-16) for a voltage input range of ±V
for a 5V reference input). Tie to ground if not used.
R
Inverting Resistors. The 20k reference inverting resistors
are connected internally from R
R
normal operation tie R
reference inverting amplifi er (see Typical Applications).
REFD (Pin 16): Inverted Reference Voltage for DAC D, with
internal connection to the reference inverting resistor. The
20k resistor is connected internally from REFD to R
For normal operation tie this pin to the output of reference
inverting amplifi er (see Typical Applications). Typically –5V;
accepts up to ±15V. The impedance looking into this pin
is 10k to ground (R
R
pin provides the translation of the output voltage range for
bipolar spans. Accepts up to ±15V; for normal operation
tie to the positive reference voltage at R
impedance looking into this pin is 20k to ground.
R
operation tie to the output of the I/V converter amplifi er
for DAC D (see Typical Applications). The DAC output
current from I
to the R
10k to ground.
I
virtual ground when the DAC is operating and should
reside at 0V. For normal operation tie to the negative
input of the I/V converter amplifi er for DAC D (see Typi-
cal Applications).
OUT1D
COMD
COMD
OFSD
FBD
ADJD
(Pin 18): DAC D Feedback Resistor. For normal
(Pin 17): Bipolar Offset Network for DAC D. This
(Pin 15): Center Tap Point for Reference Amplifi er
(Pin 19): DAC D Current Output. This pin is a
to REFD, respectively (see Block Diagram). For
(Pin 14): Gain Adjust Pin for DAC D. This control
FBD
pin. The impedance looking into this pin is
OUT1D
IND
fl ows through the feedback resistor
COMD
and R
to the negative input of external
COMD
INX
IND
, R
fl oating).
COMX
to R
IND
COMD
and REFX) may
RIND
(Pin 13). The
and from
(i.e., ±5V
COMD
2754f
.