LTC2754 LINER [Linear Technology], LTC2754 Datasheet - Page 10

• Manufacturer Part Number: LTC2754
• Description: Quad 12-/16-Bit SoftSpan IOUT DACs
• Manufacturer: LINER [Linear Technology]

LTC2754
S0 (Pin 33): Span Bit 0. In Manual Span mode (M-SPAN
tied to V
a single fi xed output range for all DACs. These pins should
be tied to either GND or V
S1 (Pin 34): Span Bit 1. In Manual Span mode (M-SPAN
tied to V
a single fi xed output range for all DACs. These pins should
be tied to either GND or V
S2 (Pin 35): Span Bit 2. In Manual Span mode (M-SPAN
tied to V
a single fi xed output range for all DACs. These pins should
be tied to either GND or V
LDAC (Pin 36): Asynchronous DAC Load Input. When
LDAC is a logic low, all DACs are updated (CS/LD must
be high).
GND (Pin 37): Ground; provides shielding for I
to ground.
I
I
R
Amplifi er. The 20k input resistor is connected internally
from R
external reference voltage V
tions). Any or all of these precision-matched resistor sets
(Each set comprising R
used to invert one or more positive reference voltages to
the negative voltages needed by the DACs. Typically 5V;
accepts up to ±15V.
GE
pin can be used to null gain error or to compensate for
reference errors. Nominal adjustment range is ±512 LSB
(LTC2754-16) for a voltage input range of ±V
for a 5V reference input). Tie to ground if not used.
R
Inverting Resistors. The 20k reference inverting resistors
are connected internally from R
R
normal operation tie R
reference inverting amplifi er (see Typical Applications).
REFB (Pin 42): Inverted Reference Voltage for DAC B, with
internal connection to the reference inverting resistor. The
PIN FUNCTIONS
10
OUT2B
OUT2B
INB
COMB
COMB
ADJB
(Pin 39): Input Resistor for Reference Inverting
(Pin 38): DAC B Current Output Complement. Tie
to ground.
INB
(Pin 41): Center Tap Point for Reference Amplifi er
to REFB, respectively (see Block Diagram). For
(Pin 40): Gain Adjust Pin for DAC B. This control
DD
DD
DD
), Pins S0, S1 and S2 are pin-strapped to select
), Pins S0, S1 and S2 are pin-strapped to select
), Pins S0, S1 and S2 are pin-strapped to select
to R
COMB
. For normal operation tie R
COMB
INX
DD
DD
DD
to the negative input of external
, R
even if they are unused.
even if they are unused.
even if they are unused.
REFB
COMX
INB
(see Typical Applica-
to R
and REFX) may be
COMB
RINB
OUT2B
and from
INB
(i.e., ±5V
to the
. Tie
20k resistor is connected internally from REFB to R
For normal operation tie this pin to the output of reference
inverting amplifi er (see Typical Applications). Typically –5V;
accepts up to ±15V. The impedance looking into this pin
is 10k to ground (R
R
pin provides the translation of the output voltage range for
bipolar spans. Accepts up to ±15V; for normal operation
tie to the positive reference voltage at R
impedance looking into this pin is 20k to ground.
R
operation tie to the output of the I/V converter amplifi er
for DAC B (see Typical Applications). The DAC output
current from I
to the R
10k to ground.
I
ground when the DAC is operating and should reside at
0V. For normal operation tie to the negative input of the I/V
converter amplifi er for DAC B (see Typical Applications).
V
pin can be used to null unipolar offset or bipolar zero error.
The offset-voltage delta is inverted and attenuated such that
a 5V control voltage applied to V
–512 LSB (LTC2754-16) in any output range (assumes a
5V reference voltage at R
V
pin can be used to null unipolar offset or bipolar zero error.
The offset-voltage delta is inverted and attenuated such that
a 5V control voltage applied to V
–512 LSB (LTC2754-16) in any output range (assumes a
5V reference voltage at R
I
ground when the DAC is operating and should reside at
0V. For normal operation tie to the negative input of the I/V
converter amplifi er for DAC A (see Typical Applications).
R
operation tie to the output of the I/V converter amplifi er
for DAC A (see Typical Applications). The DAC output
current from I
to the R
10k to ground.
OUT1B
OUT1A
OSADJB
OSADJA
OFSB
FBB
FBA
(Pin 44): DAC B Feedback Resistor. For normal
(Pin 49): DAC A Feedback Resistor. For normal
(Pin 45): DAC B Current Output. This pin is a virtual
(Pin 48): DAC A Current Output. This pin is a virtual
(Pin 43): Bipolar Offset Network for DAC B. This
FBB
FBA
(Pin 46): DAC B Offset Adjust Pin. This control
(Pin 47): DAC A Offset Adjust Pin. This control
pin. The impedance looking into this pin is
pin. The impedance looking into this pin is
OUT1B
OUT1A
INB
fl ows through the feedback resistor
fl ows through the feedback resistor
and R
INB
INA
). Tie to ground if not used.
). Tie to ground if not used.
COMB
OSADJB
OSADJA
fl oating).
produces ΔV
produces ΔV
INB
(Pin 39). The
COMB
OS
OS
2754f
=
=
.