LTC2355-12_09 LINER [Linear Technology], LTC2355-12_09 Datasheet
LTC2355-12_09
Related parts for LTC2355-12_09
LTC2355-12_09 Summary of contents
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... MSOP package. A Sleep shutdown feature further reduces power consumption to 13µW. The com- bination of speed, low power and tiny package makes the LTC2355-12/LTC2355-14 suitable for high speed, portable applications. The 80dB common mode rejection allows users to eliminate ground loops and common mode noise by measuring signals differentially from the source ...
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... Digital Input Voltages ................... – 0. Digital Output Voltage ...................– 0. Power Dissipation ...............................................100mW Operation Temperature Range LTC2355C-12/LTC2355C-14 .................... 0°C to 70°C LTC2355I-12/LTC2355I-14 ...................– 40°C to 85°C Storage Temperature Range .................. –65°C to 150°C Lead Temperature (Soldering, 10 sec)................... 300°C orDer inFormation LEAD FREE FINISH ...
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... P-P P-P The = 25° OUT = 3.1V to 3.6V 2.5V DD REF = 10µF REF MIN TYP 0.3 –60 –15 LTC2355-12 LTC2355-14 TYP MAX MIN TYP 71.1 74.2 69 71.1 71 73.8 –86 –86 –82 –76 – –82 –82 0. denotes the specifications which apply over the ...
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... OUT 3.3V OUT DD The denotes the specifications which apply over the full operating temperature l = 25°C. (Note 17) CONDITIONS Active Mode Nap Mode Sleep Mode (LTC2355-12) Sleep Mode (LTC2355-14) denotes the specifications which apply over the l MIN TYP MAX 2.4 l 0.6 l ± 2.5 2.9 l ...
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... Output data can be read with an arbitrarily long clock. Note 17 Note 18: The LTC2355-14 is measured and specified with 14-bit resolution (1LSB = 152µV) and the LTC2355-12 is measured and specified with 12-bit resolution (1LSB = 610µV). Note 19: The sampling capacitor at each input accounts for 4.1pF of the must be within this range. ...
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... FREQUENCY (MHz) –1 –2 –3 –4 12288 16384 2355 G07 T = 25° 3.3V (LTC2355-14 SFDR vs Input Frequency 100 0.1 1 FREQUENCY (MHz) 2355 G02 1.4MHz Sine Wave 8192 Point FFT Plot 0 –10 –20 – ...
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... Differential and Integral Linearity vs Conversion Rate –1 –2 –3 –4 2.0 2.2 2.4 2.6 2.8 3.0 CONVERSION RATE (Msps 25° 3.3V (LTC2355-12 and LTC2355-14 2.5V Power Bandwidth P –6 –12 –18 –24 –30 –36 1M 10M 100M FREQUENCY (Hz) 2355 G11 Internal Reference Voltage vs Load Current 2 ...
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... V (Pin 7): 3.3V Positive Supply. This single power pin DD supplies 3.3V to the entire device. Bypass to GND and to a solid analog ground plane with a 10µF ceramic capacitor Block Diagram LTC2355- – ...
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... SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION D11 D10 14-BIT DATA WORD t CONV t THROUGHPUT LTC2355-14 Timing Diagram HOLD t 10 SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION D13 D12 ...
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... If slower op amps are used, more time for settling can be provided by increasing the time between conversions. The best choice for an op amp to drive the LTC2355-12/ LTC2355-14 will depend on the application. Generally, ap- plications fall into two categories: AC applications where ...
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... TO 18V 2355 F01 Figure 2. Overdriving V INPUT RANGE The analog inputs of the LTC2355-12/LTC2355-14 may be driven fully differentially with a single supply. Each input may swing up to 2.5V internal reference, the noninverting input should never be more than 2.5V more positive than the inverting input. The ...
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... LTC2355-12/LTC2355-14. The code transitions occur midway between successive integer LSB values (i.e., 0.5LSB, 1.5LSB, 2.5LSB, FS – 1.5LSB). The output code is straight binary with 1LSB = 2.5V/16384 = 153µV for the LTC2355-14, and 1LSB = 2.5V/4096 = 610µV for the LTC2355-12. The LTC2355-14 has 1LSB RMS of random white noise – ...
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... All analog circuitry grounds should be terminated at the LTC2355-12/LTC2355-14 GND (Pins and exposed pad). The ground return from the LTC2355- 12/LTC2355-14 (Pins and exposed pad) to the power supply should be low impedance for noise free operation. In applications where the ADC data outputs ...
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... LTC2355-12/LTC2355-14 and then buffer this signal with the appropriate number of inverters to ensure the correct delay driving the frame sync input of the processor serial port good practice to drive the LTC2355-12/LTC2355- 14 CONV input first to avoid digital noise interference during the sample-to-hold transition triggered by CONV at the start of conversion ...
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... In these cases, a 100Ω resistor in series with SDO can isolate the input capacitance of the receiv- ing device. If the receiving device has more than 10pF of input capacitance or is located far from the LTC2355- 12/LTC2355-14, an NC7SVU04P5X inverter can be used to provide more drive. ...
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... LTC2355-12/LTC2355-14 package Description 2.794 0.102 (.110 .004) 5.23 (.206) MIN 0.305 0.038 (.0120 .0015) TYP RECOMMENDED SOLDER PAD LAYOUT DETAIL “A” 0.254 (.010) GAUGE PLANE 0.18 (.007) NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. ...
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... Revise Values in Pin Configuration Section Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. LTC2355-12/LTC2355-14 PAGE NUMBER 2 2355fa ...
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... PRE D Q CONV Q CLR CONVERT ENABLE NL17SZ74 CONV LTC2355 SCK NC7SVU04P5X SDO 100 COMMENTS 5V or ±5V Supply, 4.096V or ±2.5V Span 3V, 15mW, Unipolar Inputs, MSOP Package 3V, 15mW, Bipolar Inputs, MSOP Package 5V, Selectable Spans, 115mW 5V, Selectable Spans, 80dB SINAD ±5V Supply, ±2.5V Span, 72dB SINAD ± ...