LTC1292 LINER [Linear Technology], LTC1292 Datasheet - Page 15

• Manufacturer Part Number: LTC1292
• Description: Single Chip 12-Bit Data Acquisition Systems
• Manufacturer: LINER [Linear Technology]

A
t
R
settling time. In general for both the LTC1292 and LTC1297
keep the product of the total resistance and the total
capacitance less than t
met, then make C1 > 0.47 F (see RC Input Filtering
section).
suCS
SOURCE
PPLICATI
. With the minimum possible sample time of 6 s,
+ < 5k and C1 < 20pF will provide adequate
(–) INPUT
(+) INPUT
(–) INPUT
(+) INPUT
D
D
CLK
CLK
OUT
OUT
CS
CS
O
U
S
SMPL
I FOR ATIO
U
/9. If this condition can not be
(+) INPUT MUST SETTLE DURING THIS TIME
Figure 11c. Setup Time (t
t
WHCS
Figure 11b. Setup Time (t
W
HI-Z
(+) INPUT MUST SETTLE DURING THIS TIME
t
t
SMPL
WHCS
HI-Z
U
t
SMPL
suCS
suCS
1ST BIT TEST (–) INPUT MUST
) Is Not Met for the LTC1292
SETTLE DURING THIS TIME
“–” Input Settling
At the end of the sample phase the input capacitor switches
to the “–” input and the conversion starts (see Figures 11a,
11b, 11c and 12). During the conversion, the “+” input
voltage is effectively “held” by the sample-and-hold and
will not affect the conversion result. It is critical that the
) Is Met for the LTC1292
1ST BIT TEST (–) INPUT MUST
SETTLE DURING THIS TIME
B11
LTC1292/LTC1297
B10
B11
LTC1292/7 F11b
LTC1292/7 F11c
B9
B10
15