LTC1292 LINER [Linear Technology], LTC1292 Datasheet - Page 14

• Manufacturer Part Number: LTC1292
• Description: Single Chip 12-Bit Data Acquisition Systems
• Manufacturer: LINER [Linear Technology]

LTC1292/LTC1297
A
Source Resistance
The analog inputs of the LTC1292/LTC1297 look like a
100pF capacitor (C
(Figures 10a and 10b). C
(–) inputs once during each conversion cycle. Large
external source resistors and capacitances will slow the
settling of the inputs. It is important that the overall RC
time constant is short enough to allow the analog inputs to
settle completely within the allowed time.
“+” Input Settling
The input capacitor for the LTC1292 is switched onto the
“+” input during the sample phase (t
11b and 11c). The sample period can be as short as t
+ 1/2 CLK cycle or as long as t
before a conversion starts. This variability depends on
where CS falls relative to CLK. The voltage on the “+” input
must settle completely within the sample period. Minimizing
R
input source resistance must be used, the sample time can
be increased by using a slower CLK frequency. With the
minimum possible sample time of 3.0 s, R
and C1 < 20pF will provide adequate settling time.
The sample period for the LTC1297 starts on the falling
edge of CS and ends on the falling edge of the first CLK
14
SOURCE
PPLICATI
+ and C1 will improve the settling time. If large “+”
(–) INPUT
(+) INPUT
D
CLK
OUT
CS
O
IN
U
) in series with a 500 resistor (R
S
IN
I FOR ATIO
gets switched between (+) and
U
WHCS
(+) INPUT MUST SETTLE DURING THIS TIME
SMPL
Figure 11a. Setup Time (t
W
+ 1 1/2 CLK cycles
t
WHCS
, see Figures 11a,
SOURCE
HI-Z
t
SMPL
“+” and “–” Input Settling Windows
U
+ < 2.0k
WHCS
ON
)
t
suCS
SUCS
1ST BIT TEST (–) INPUT MUST
SETTLE DURING THIS TIME
(Figure 12). The length of the sample period is t
CLK cycles. Again, the voltage on the “+” input must settle
completely within the sample period. If large “+” input
source resistance must be used, the sample time can be
increased by using a slower CLK frequency or by increasing
) Is Met for the LTC1292
Figure 10b. Analog Input Equivalent Circuit for the LTC1297
Figure 10a. Analog Input Equivalent Circuit for the LTC1292
V
V
V
V
IN
IN
IN
IN
–
+
–
+
R
R
R
R
SOURCE
SOURCE
SOURCE
SOURCE
+
+
–
–
B11
C1
C1
INPUT
C2
INPUT
INPUT
C2
INPUT
“–”
“–”
“+”
“+”
B10
t
+ 0.5 CLK
CS
suCS
t
+ 0.5 CLK
CS
WHCS
LTC1292/7 F11a
500
500
R
R
ON
ON
B9
LTC1292
LTC1297
C
100pF
C
100pF
LTC1292/7 F10b
LTC1292/7 F10a
IN
IN
suCS
+0.5