MC2GH256NMCA-2SA00 SAMSUNG [Samsung semiconductor], MC2GH256NMCA-2SA00 Datasheet - Page 54

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MC2GH256NMCA-2SA00

Manufacturer Part Number
MC2GH256NMCA-2SA00
Description
SAMSUNG MultiMediaCard
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
The MultiMediaCard bus clock signal can be used by the host to put the card into energy saving mode, or to control the
data flow (to avoid under-run or over-run conditions) on the bus. The host is allowed to lower the clock frequency or shut it
down.
There are a few restrictions the host must follow:
The CRC is intended for protecting MultiMediaCard commands, responses and data transfer against transmission errors
on the MultiMediaCard bus. One CRC is generated for every command and checked for every response on the CMD line.
For data blocks one CRC per transferred block, per data line, is generated. The CRC is generated and checked as
described in the following.
• CRC7
The CRC7 check is used for all commands, for all responses except type R3, and for the CSD and CID registers. The
CRC7 is a 7-bit value and is computed as follows:
All CRC registers are initialized to zero. The first bit is the most left bit of the corresponding bit string (of the command,
response, CID or CSD). The degree n of the polynomial is the number of CRC protected bits decreased by one. The num-
ber of bits to be protected is 40 for commands and responses (n = 39), and 120 for the CSD and CID (n = 119).
6.3 Clock Control
6.4 Cyclic Redundancy Codes (CRC)
Revision 0.3
the card, and the identification frequency defined by the specification document).
operation before shutting down the clock. Following is a list of the various bus transactions:
The bus frequency can be changed at any time (under the restrictions of maximum data transfer frequency, defined by
It is an obvious requirement that the clock must be running for the card to output data or response tokens. After the
last MultiMediaCard bus transaction, the host is required, to provide 8 (eight) clock cycles for the card to complete the
A command with no response. 8 clocks after the host command end bit.
A command with response. 8 clocks after the card response end bit.
A read data transaction. 8 clocks after the end bit of the last data block.
A write data transaction. 8 clocks after the CRC status token.
The host is allowed to shut down the clock of a “busy” card. The card will complete the programming operation
regardless of the host clock. However, the host must provide a clock edge for the card to turn off its busy signal.
Without a clock edge the card (unless previously disconnected by a deselect command -CMD7) will force the DAT0
line down, forever.
CRC 6…0
M x ( )
Generator polynomial
[
=
(
first bit
]
=
data in
Remainder M x ( ) x
)
×
x
n
G x ( )
+
(
Figure 6-3 : CRC7 Generator/Checker
second bit
[
(
=
x
7
+
x
7
3
) x
) G x ( )
×
+
54
1
n 1
]
+
+
(
last bit
data out
)
×
x
0
MultiMediaCard
Sep.22.2005
TM

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