SM8580 Nippon_Precision_Circuits America, SM8580 Datasheet - Page 16

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SM8580

Manufacturer Part Number
SM8580
Description
Real-time Clock ic
Manufacturer
Nippon_Precision_Circuits America
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
SM8580AM
Manufacturer:
NPC
Quantity:
20 000
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Quantity:
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Timer Registers (Bank 2, Registers 4 to 8, E)
Timer control registers (registers 8, E)
I
I
I
I
Timer source clock set register (register 8)
I
TE bit (timer enable)
Timer countdown stop/start control bit.
When set to 1, the timer starts counting down.
When set to 0 during countdown, the timer stops.
TF bit (timer flag)
The timer flag is set to 1 when the timer counter
counts down to zero, occurring a timer event. A
logic 0 cannot be written to TF for 1µs maximum
after TF is set to 1. It is held at 1 until 0 is written
to this bit. A 1 cannot be written to TF.
TIE bit (timer interrupt enable)
This bit enables the timer interrupt output on
TIRQN when a timer event is occurred. If the TIE
is not set to 1, then no output occurs even if the TF
bit is set to 1. The TIRQN output is high imped-
ance when TIE is set to 0.
TI/TP bit (level/periodic interrupt mode select bit)
Sets the timer interrupt signal output mode.
The SM8580AM supports two timer function
modes.
The register 8 bits 0 and 1 set the timer source
clock to one of four frequencies listed in the fol-
lowing table.
Bank
Bank
2
2
Address
Address
8
E
8
Timer control
Timer setting
Timer setting
Register
Register
SM8580AM
• TI/TP = 0 (level interrupt mode)
• TI/TP = 1 (periodic interrupt mode)
When a timer interrupt is occurred, TIRQN
goes LOW (if TIE = 1) and TF is set to 1.
TIRQN remains LOW and TF is held at 1 until
a 0 is written to the TF bit.
The timer operates by counting down until the
data is zero, then the TE bit is cleared and the
count stops automatically. However, if the timer
is started when the TF bit is 1, then the TE bit is
not cleared. The timer count register contents
remain zero after the count down stops.
When a timer interrupt is occurred, TIRQN
goes LOW (if TIE = 1) and TF is set to 1.
TIRQN subsequently goes high impedance
after a fixed interval, but TF is held at 1 until a 0
is written to the TF bit.
The timer operates by counting down until the
data is zero, then the timer register data is
reloaded automatically after a fixed interval,
and the countdown restarts. This mode can be
used as a repetitive interval timer.
TD1
Bit 3
Bit 3
TE
0
0
1
1
NIPPON PRECISION CIRCUITS INC.—16
TI/TP
Bit 2
Bit 2
TD0
0
1
0
1
Bit 1
Bit 1
TD1
TF
Timer source clock
1/60Hz (1 minute)
4096Hz
64Hz
1Hz
Bit 0
Bit 0
TD0
TIE

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