SN74LS192N MOTOROLA [Motorola, Inc], SN74LS192N Datasheet - Page 6

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SN74LS192N

Manufacturer Part Number
SN74LS192N
Description
PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Part Number:
SN74LS192N
Manufacturer:
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Quantity:
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Part Number:
SN74LS192N
Quantity:
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AC SETUP REQUIREMENTS
DEFINITIONS OF TERMS
SETUP TIME (t s ) is defined as the minimum time required for
the correct logic level to be present at the logic input prior to the
PL transition from LOW-to-HIGH in order to be recognized and
transferred to the outputs.
HOLD TIME (t h ) is defined as the minimum time following the
PL transition from LOW-to-HIGH that the logic level must be
maintained at the input in order to ensure continued recogni-
t W
t s
t h
t rec
Symbol
Symbol
Any Pulse Width
Data Setup Time
Data Hold Time
Recovery Time
Parameter
Parameter
(T A = 25 C)
SN54/74LS192 SN54/74LS193
FAST AND LS TTL DATA
Min
5.0
20
20
40
Limits
5-356
Typ
tion. A negative HOLD TIME indicates that the correct logic
level may be released prior to the PL transition from
LOW-to-HIGH and still be recognized.
RECOVERY TIME (t rec ) is defined as the minimum time
required between the end of the reset pulse and the clock
transition from LOW-to-HIGH in order to recognize and
transfer HIGH data to the Q outputs.
Max
Unit
Unit
ns
ns
ns
ns
Test Conditions
Test Conditions
V CC = 5.0 V
V CC = 5.0 V
V CC = 5.0 V

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