CS42428 CIRRUS [Cirrus Logic], CS42428 Datasheet - Page 22

• Manufacturer Part Number: CS42428
• Description: 114 dB, 192kHz 8-Ch CODEC WITH PLL
• Manufacturer: CIRRUS [Cirrus Logic]

3.5.4
3.5.4.1
One Line Mode Configuration #1 can support up to 8 channels of DAC data, and 6 channels of ADC data.
This is the only configuration which will support up to 24-bit samples at a sampling frequency of 48 kHz
on all channels for both the DAC and ADC.
22
Functional Mode Register (addr = 03h)
Interface Format Register (addr = 04h)
Misc. Control Register (addr = 05h)
ADC Mode
Set DAC_FMx = ADC_FMx = 00,01,10
Set ADC_CLK_SEL = 0
Set DIFx bits to proper serial format
Set ADC_OLx bits = 00,01,10
Set DAC_OLx bits = 00,01,10
Set DAC_SP M/S = 1
Set ADC_SP M/S = 1
Set EXT ADC SCLK = 0
One Line Mode(OLM) Configurations
OLM Config #1
Register / Bit Settings
Not One
Line Mode
One Line
Mode #1
One Line
Mode #2
DAC_SCLK=64Fs
DAC_LRCK=SSM/DSM/QSM
DAC_SCLK=128Fs
DAC_LRCK=SSM/DSM
ADC_SCLK=64Fs
ADC_LRCK=DAC_LRCK
DAC_SCLK=256Fs
DAC_LRCK=SSM
ADC_SCLK=64Fs
ADC_LRCK=DAC_LRCK
CS5361
CS5361
Not One Line Mode
SDOUT1
SDOUT2
S CLK
LRCK
MCLK
Figure 13. OLM Configuration #1
RM CK
A DCIN1
A DCIN2
CS42428
DAC_LRCK must equal ADC_LRCK; sample rate conversion not supported
ADC_S DOUT
Select ADC operating mode, see table below for valid combinations
Select DAC operating mode, see table below for valid combinations
DAC_SDIN1
DAC_SDIN2
DAC_SDIN3
DAC_SDIN4
A DC_SCLK
ADC_LRCK
DA C_LRCK
DAC_SCLK
Configure ADC_SDOUT to be clocked from the DAC_SP clocks.
DAC_SCLK=128Fs
DAC_LRCK=SSM/DSM
ADC_SCLK=64Fs
ADC_LRCK=DAC_LRCK
DAC_SCLK=128Fs
DAC_LRCK=SSM/DSM
ADC_SCLK=64Fs
ADC_LRCK=DAC_LRCK
Select the digital interface format when not in one line mode
Identify external ADC clock source as ADC Serial Port.
One Line Mode #1
not valid
64Fs
Configure DAC Serial Port to master mode.
Configure ADC Serial Port to master mode.
64Fs,128Fs, 256Fs
ADC Data
DAC Mode
MCLK
S CLK _P ORT1
LRCK_PORT1
SDIN_PORT1
S CLK _P ORT2
LRCK_PORT2
SDOUT1_PORT2
SDOUT2_PORT2
SDOUT3_PORT2
SDOUT4_PORT2
DIG ITAL AUDIO
Description
PRO CESSO R
DAC_SCLK=256Fs
DAC_LRCK=SSM
ADC_SCLK=64Fs
ADC_LRCK=DAC_LRCK
One Line Mode #2
not valid
not valid
CS42428