88e3015 Marvell Semiconductor, Inc., 88e3015 Datasheet - Page 24

• Manufacturer Part Number: 88e3015
• Description: Integrated 10/100 Fast Ethernet Transceiver
• Manufacturer: Marvell Semiconductor, Inc.

2.1 MAC Interface
The MAC interfaces that are available for each device are listed in
Differences,” on page
All ports on the devices operate in the same interface mode that is selected.
2.1.1 Reduced Gigabit Media Independent Interface (RGMII)
The 88E3015/88E3018 device supports the RGMII specification (Version 1.2a, 9/22/2000, version 2.0, 04/2002 -
instead of HSTL, it supports 2.5V SSTL_2.).
Figure 5: RGMII Signal Diagram
The interface runs at 2.5 MHz for 10 Mbps and 25 MHz for 100 Mbps. The TX_CLK signal is always generated by
the MAC, and the RX_CLK signal is generated by the PHY.
During packet reception, RX_CLK may be stretched on either the positive or negative pulse to accommodate the
transition from the free running clock to a data synchronous clock domain. When the speed of the PHY changes,
a similar stretching of the positive or negative pulse is allowed. No glitching of the clocks is allowed during speed
transitions.
The MAC must hold TX_CTRL low until the MAC has ensured that TX_CTRL is operating at the same speed as
the PHY.
Doc. No. MV-S103657-00, Rev. C
Page 24
4.
88E3015/88E3018
Integrated 10/100 Fast Ethernet Transceiver
MAC
Document Classification: Proprietary Information
CONFIDENTIAL
RGMII Interface
TX_CTL
RX_CTL
TD[3:0]
RD[3:0]
RXC
TXC
Table 1, “88E3015/88E3018 Devices Feature
TX_CLK
TX_CTRL
TXD[3:0]
RX_CLK
RX_CTRL
RXD[3:0]
PHY
October 26, 2006, Advance
Copyright © 2006 Marvell