PLL601-02 PhaseLink (PLL), PLL601-02 Datasheet - Page 2

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PLL601-02

Manufacturer Part Number
PLL601-02
Description
, 4x or 8x Out, 10 - 27MHz In, -126dBc @ 1kHz
Manufacturer
PhaseLink (PLL)
Datasheet
PIN DESCRIPTIONS
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
REFOUT
REFEN
Name
XOUT
GND
VDD
CLK
XIN
OE
S0
S1
S3
9,14,15,16
Number
3,4,5
12
13
11
10
1
2
8
6
7
Type
O
O
O
P
P
I
I
I
I
I
I
Clock output from VCO. Equals the input frequency times multiplier.
Reference clock enable. When Low, it turns off REFOUT.
3.3V Power Supply.
Crystal input to be connected to 10-27MHz fundamental parallel mode crys-
tal (C
Crystal Connection.
Output Enable. Tri-state CLK and REFOUT when low. Has internal pull-up.
Buffered crystal oscillator clock output. Controlled by REFEN.
Multiplier Select Pin 0. Determines CLK output. Has internal pull-up.
Multiplier Select Pin 1. Determines CLK output. Has internal pull-up.
Multiplier Select Pin 3. Determines CLK output. Has internal pull-up.
Ground.
L
=15pF). On chip load capacitors: No external capacitor required.
Low Phase Noise PLL Clock Multiplier
Description
Preliminary
PLL601-02
Rev 04/23/01 Page 2

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