74HCT3G06DC,125 NXP Semiconductors, 74HCT3G06DC,125 Datasheet
74HCT3G06DC,125
Specifications of 74HCT3G06DC,125
74HCT3G06DC-G
935274807125
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74HCT3G06DC,125 Summary of contents
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Triple inverter with open-drain outputs Rev. 03 — 11 May 2009 1. General description The 74HC3G06 and 74HCT3G06 are high-speed Si-gate CMOS devices. They provide three inverting buffers with open-drain outputs. The outputs of the 74HC3G06 and 74HCT3G06 ...
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... NXP Semiconductors 4. Marking Table 2. Marking code Type number 74HC3G06DP 74HCT3G06DP 74HC3G06DC 74HCT3G06DC 74HC3G06GD 74HCT3G06GD 5. Functional diagram 001aah899 Fig 1. Logic symbol 6. Pinning information 6.1 Pinning 74HC3G06 74HCT3G06 GND 001aak028 Fig 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 74HC_HCT3G06_3 Product data sheet 74HC3G06 ...
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... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin 1A, 2A GND 4 1Y, 2Y Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level high-impedance OFF-state. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...
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... NXP Semiconductors 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V) ...
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... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at T Symbol Parameter Conditions 74HCT3G06 V HIGH-level input V IH voltage V LOW-level input V IL voltage V LOW-level output V OL voltage I input leakage V I current I output leakage V LO current ...
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... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); all typical values are measured at T Symbol Parameter Conditions 74HCT3G06 t OFF-state to LOW nA to nY; see PZL propagation delay t LOW to OFF-state nA to nY; see PLZ propagation delay t HIGH to LOW output V THL transition time ...
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... NXP Semiconductors negative positive Test data is given in Table Definitions for test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 7. Test circuit for measuring switching times Table 10. Test data Type ...
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... NXP Semiconductors 13. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.00 0.75 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...
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... NXP Semiconductors VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0. 0.12 0.00 0.60 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 0.5 mm terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.35 2.1 mm 0.5 0.00 0.15 1.9 OUTLINE VERSION IEC SOT996 Fig 10. Package outline SOT996-2 (XSON8U) ...
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... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Added type number 74HC3G06GD and 74HCT3G06GD (XSON8U package) ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 14 Abbreviations ...