pll2109x Samsung Semiconductor, Inc., pll2109x Datasheet - Page 3

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pll2109x

Manufacturer Part Number
pll2109x
Description
Description = PLL2109X 100MHz ~ 500MHz FSPLL ;; Function = FSPLL ;; Configuration = 100~500MHz FSPLL ;; Library Type = STD150 ;; Characteristic = 1.2V/3mA
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
100MHZ ~ 500MHZ FSPLL
CORE PIN DESCRIPTION
I/O Type Abbr.
— DI: Digital Input
— AO: Analog Output
— DO: Digital Output
— AP: Analog Power
— AG: Analog Ground
— AB: Analog Sub Bias
— DP: Digital Power
— DG: Digital Ground
— DB: Digital Sub Bias
AVDD12D
AVSS12D
AVDD12A
AVSS12A
VABB
FIN
FOUT
FILTER
PWRDN
P[5:0]
M[7:0]
S[1:0]
Name
I/O Type
AB/DB
DG
DO
DP
AG
AO
AP
DI
DI
DI
DI
DI
Digital power supply
Digital ground
Analog power supply
Analog ground
Analog / Digital bulk bias
PLL clock input
100MHz ~ 500MHz clock output
The external loop filter capacitor should be connected between
FILTER and analog ground
Power down.
- If PWRDN is high, power down mode is enabled.
6-bit programmable pre-divider.
8-bit programmable main-divider.
2-bit programmable post-scaler.
Pin Description
PLL2109X (PRELIMINARY)
3

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