PLL130-08 PhaseLink (PLL), PLL130-08 Datasheet

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PLL130-08

Manufacturer Part Number
PLL130-08
Description
Output Level Converter Buffer , 1 PaIR Out, Translator to Pecl, < 800MHz
Manufacturer
PhaseLink (PLL)
Datasheet
FEATURES
DESCRIPTIONS
The PLL130-08 is a low cost, high performance,
high speed, buffer that reproduces any input fre-
quency from DC to 1.3GHz. It provides a pair of
differential PECL output. Any input signal with at
least 100mV swing can be used as reference
signal. This chip is ideal for conversion from sine
wave, TTL, CMOS, or LVDS to PECL.
BLOCK DIAGRAM
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Differential PECL output
Single AC coupled input (min. 100mV swing).
Input range from DC to 1.3 GHz.
3.3V operation.
Available in 8-Pin SOIC or 3x3mm QFN.
REF_IN
Amplifier
Input
High Speed Translator Buffer to PECL
REF_IN
PECL
GND
GND
GND
GND
GND
PIN CONFIGURATION
OE
Preliminary
14
15
13
16
1
2
3
4
(TOP VIEW)
12
PLL130-08
1
PECL
PECL_BAR
11
2
10
3
PLL130-08
9
4
8
7
6
5
8
7
6
5
Rev 10/29/02 Page 1
VDD
GND
PECL_BAR
VDD
PECL_BAR
GND
VDD
PECL

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PLL130-08 Summary of contents

Page 1

... Input range from DC to 1.3 GHz. 3.3V operation. Available in 8-Pin SOIC or 3x3mm QFN. DESCRIPTIONS The PLL130- low cost, high performance, high speed, buffer that reproduces any input fre- quency from DC to 1.3GHz. It provides a pair of differential PECL output. Any input signal with at least 100mV swing can be used as reference signal ...

Page 2

... PECL level PECL True output PECL Complementary output Output enable (‘1’ for enable). Internal pull-up (default is ‘1’). SYMBOL CONDITIONS REF_IN input 0.8V to 2.0V with no load 2.0V to 0.8V with no load PLL130-08 Preliminary Description MIN. MAX 0 0.5 V ...

Page 3

... V OL SYMBOL CONDITIONS t @20/80% - PECL r t @80/20% - PECL f PECL Output Skew VDD OUT 2.0V 50% OUT PECL Transistion Time Waveform DUTY CYCLE PLL130-08 Preliminary MIN. MAX. V – 1.025 DD V – 1.620 DD MIN. TYP. MAX. 0.6 1.5 0.5 1.5 t SKEW Rev 10/29/02 Page 3 UNITS V V UNITS ns ...

Page 4

... PIN ( dimensions Narrow SOIC Symbol Min. Max. A 1.47 1.73 A1 0.10 0.25 B 0.33 0.51 C 0.19 0.25 D 4.80 4.95 E 3.80 4.00 H 5.80 6.20 L 0.38 1.27 e 1.27 BSC 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 High Speed Translator Buffer to PECL TSSOP Min. Max. - 1.20 0.05 0.15 0.19 0.30 0.09 0.20 2.90 3.10 4.30 4.50 6.20 6.60 0.45 0.75 A1 0.65 BSC B e PLL130-08 Preliminary Rev 10/29/02 Page 4 ...

Page 5

... President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 High Speed Translator Buffer to PECL 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL130- PLL130-08 Preliminary REVISION CODE (when applicable) TEMPERATURATURE ...

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