74AUP2G08DC,125 NXP Semiconductors, 74AUP2G08DC,125 Datasheet - Page 9

IC AND GATE DL 2IN 8-VSSOP

74AUP2G08DC,125

Manufacturer Part Number
74AUP2G08DC,125
Description
IC AND GATE DL 2IN 8-VSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP2G08DC,125

Number Of Circuits
2
Package / Case
US8, 8-VSSOP
Logic Type
AND Gate
Number Of Inputs
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
19.4 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP2G08DC-G
74AUP2G08DC-G
935280711125
NXP Semiconductors
Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
[2]
[3]
12. Waveforms
Table 9.
74AUP2G08
Product data sheet
Symbol Parameter
C
C
Supply voltage
V
0.8 V to 3.6 V
Fig 8.
CC
L
PD
= 5 pF, 10 pF, 15 pF and 30 pF
All typical values are measured at nominal V
t
C
P
f
f
C
V
N = number of inputs switching;
Σ(C
pd
i
o
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
× V
power dissipation
capacitance
Measurement points are given in
Logic levels: V
The data input (nA or nB) to output (nY) propagation delays
PD
Dynamic characteristics
Measurement points
CC
× V
2
× f
CC
o
2
) = sum of the outputs.
× f
PLH
i
× N + Σ(C
OL
and t
and V
PHL
Conditions
f
Output
V
0.5 × V
i
OH
L
M
= 1 MHz; V
.
V
V
V
V
V
V
× V
CC
CC
CC
CC
CC
CC
are typical output voltage levels that occur with the output load.
CC
nA, nB input
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
CC
nY output
2
…continued
× f
Table
o
All information provided in this document is subject to legal disclaimers.
) where:
I
CC
= GND to V
9.
GND
.
V
V
OH
OL
V
I
Rev. 4 — 9 November 2010
Input
V
0.5 × V
M
CC
D
in μW).
V
M
CC
V
M
[3]
t
PHL
Figure
Min
-
-
-
-
-
-
T
amb
9.
Typ
2.5
2.6
2.7
2.8
3.2
3.7
= 25 °C
V
V
[1]
I
CC
t
PLH
mna224
Max
Low-power dual 2-input AND gate
-
-
-
-
-
-
T
Min
amb
-
-
-
-
-
-
74AUP2G08
= −40 °C to +125 °C Unit
(85 °C)
Max
t
≤ 3.0 ns
-
-
-
-
-
-
r
= t
© NXP B.V. 2010. All rights reserved.
f
(125 °C)
Max
-
-
-
-
-
-
9 of 21
pF
pF
pF
pF
pF
pF

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