74LVC2G240DC,125 NXP Semiconductors, 74LVC2G240DC,125 Datasheet - Page 10

IC INVERTER DUAL 4-INPUT 8VSSOP

74LVC2G240DC,125

Manufacturer Part Number
74LVC2G240DC,125
Description
IC INVERTER DUAL 4-INPUT 8VSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC2G240DC,125

Package / Case
8-VSSOP
Logic Type
Inverter
Number Of Inputs
1
Number Of Circuits
2
Current - Output High, Low
32mA, 32mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
Number Of Channels Per Chip
2
Polarity
Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
40 uA
Low Level Output Current
32 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
3 ns (Typ) @ 2.7 V or 2.5 ns (Typ) @ 3 V to 3.6 V or 2 ns (Typ) @ 4.5 V to 5.5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC2G240DC-G
74LVC2G240DC-G
935274508125
NXP Semiconductors
Table 10.
74LVC2G240
Product data sheet
Supply voltage
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Fig 9.
Test data is given in
Definitions for test circuit:
R
C
R
V
Test circuit for measuring switching times
L
L
T
EXT
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to the output impedance Z
= External voltage for measuring switching times.
Input
V
V
V
2.7 V
2.7 V
V
I
CC
CC
CC
Table
10.
Load
C
30 pF
30 pF
50 pF
50 pF
50 pF
L
G
All information provided in this document is subject to legal disclaimers.
V
Rev. 5 — 15 September 2010
I
R T
R
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
L
DUT
V
CC
V
O
V
t
open
open
open
open
open
PLH
EXT
C L
o
of the pulse generator.
, t
V
Dual inverting buffer/line driver; 3-state
PHL
mna616
EXT
R L
R L
t
GND
GND
GND
GND
GND
PZH
, t
74LVC2G240
PHZ
© NXP B.V. 2010. All rights reserved.
t
2 × V
2 × V
6 V
6 V
2 × V
PZL
, t
CC
CC
CC
PLZ
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