DS1743P DALLAS [Dallas Semiconductor], DS1743P Datasheet - Page 5

• Manufacturer Part Number: DS1743P
• Description: Y2KC Nonvolatile Timekeeping RAM
• Manufacturer: DALLAS [Dallas Semiconductor]

WRITING DATA TO RAM OR CLOCK
The DS1743 is in the write mode whenever
referenced to the latter occurring transition of
the cycle.
write cycle. Data in must be valid t
typical application, the
that care is taken with the data bus to avoid bus contention. If
data bus can become active with read data defined by the address inputs. A low transition on
then disable the outputs t
DATA RETENTION MODE
The 5-volt device is fully accessible and data can be written or read only when V
However, when V
clock registers and SRAM are blocked from any access. At this time(PowerCap only)the power fail reset
output signal ( RST ) is driven active and will remain active until V
falls below the battery switch point V
the backup battery. RTC operation and SRAM data are maintained from the battery until V
nominal levels. The 3.3-volt device is fully accessible and data can be written or read only when V
greater than V
time the power fail reset output signal ( RST ) is driven active and will remain active until V
nominal levels. If V
when V
supply (V
until V
requires a pull up. Except for the RST , all control, data, and address signals must be powered down when
V
BATTERY LONGEVITY
The DS1743 has a lithium power source that is designed to provide energy for clock activity and clock and
RAM data retention when the V
sufficient to power the DS1743 continuously for the life of the equipment in which it is installed. For
specification purposes, the life expectancy is 10 years at 25 C with the internal clock oscillator running in
the absence of V
source disconnected, guaranteeing full energy capacity. When V
V
DS1743 will be much longer than 10 years since no lithium battery energy is consumed when V
present.
BATTERY MONITOR
The DS1743 constantly monitors the battery voltage of the internal battery. The Battery Flag bit (bit 7) of
the day register is used to indicate the voltage level range of the battery. This bit is not writable and should
always be a 1 when read. If a 0 is ever present, an exhausted lithium energy source is indicated and both
the contents of the RTC and RAM are questionable.
CC
PF
, the lithium energy source is enabled for battery backup operation. Actual life expectancy of the
is powered down.
CC
CC
BAT)
is returned to nominal levels. The RST (PowerCap only) signal is an open drain output and
drops below V
CE
when V
PF.
or
When V
CC
CC
WE
PF
is below the power fail point, V
power. Each DS1743 is shipped from Dallas Semiconductor with its lithium energy
CC
is less than Vso
must return inactive for a minimum of t
OE
drops below Vso. RTC operation and SRAM data are maintained from the battery
WEZ
PF.
CC
If V
signal will be high during a write cycle. However,
falls below the power fail point, V
after
PF
CC
is greater than Vso, the device power is switched from V
WE
supply is not present. The capability of this internal power supply is
DS
SO
,
goes active.
the device power is switched from V
(battery supply level), device power is switched from the V
prior to the end of write and remain valid for t
WE
WE
, and
, on
5 of 17
PF
,
(point at which write protection occurs) the internal
CE
CE
are in their active state. The start of a write is
. The addresses must be held valid throughout
OE
PF
WR
,
access to the device is inhibited. At this
CC
is low prior to
prior to the initiation of another read or
CC
is first applied at a level greater than
returns to nominal levels. When V
CC
to the backup supply (V
OE
WE
can be active provided
CC
transitioning low the
is greater than V
DH
afterward. In a
CC
CC
DS1743/DS1743P
to the backup
is returned to
CC
returns to
WE
CC
pin to
CC
CC
will
BAT
PF.
CC
is
is
)