UPD72001-A8 NEC [NEC], UPD72001-A8 Datasheet - Page 8

• Manufacturer Part Number: UPD72001-A8
• Description: MULTI-PROTOCOL SERIAL CONTROLLERS
• Manufacturer: NEC [NEC]

(4) CLK (System Clock) ... Input
(5) WR (Write) ... Input
(6) RD (Read) ... Input
(7) B/A (Channel B/Channel A) ... Input
(8) C/D (Control/Data) ... Input
8
This pin inputs the system clock. The input frequency must be five times that of the data transfer rate or higher.
This pin inputs a write control signal for control words and transmit data. This pin is active-low.
This pin inputs a read control signal for status and receive data. This pin is active-low.
This pin inputs a signal to select a channel to be accessed when data is written or read. When this pin is “L”,
channel A is selected; when it is “H”, channel B is selected.
This pin inputs a signal that determines the type of the data on the data bus when the data is written or read.
DTRA/DRQT
DTRB/DRQR
TR
XI1A/STR
XI1B/STR
DCDA, DCDB
XI2A/SYNCA
XI2B/SYNCB
RTSA, RTSB
CTSA, CTSB
R
T
Pin Name
X
X
X
D7 to D0
DRQR
DRQT
DA, T
DA, R
CA, TR
INTAK
PRO
WR
C/D
PRI
B/A
INT
RD
X
X
X
X
A
A
DB
X
X
DB
X
CA
CB
CB
X
X
B,
B
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
Table 1-1. Pin Status at Reset
RESET (system reset)
DTR function, “H”
Depends on PRI
High impedance
Input status
Input status
“H”
“H”
“L”
“L”
–
–
–
–
–
–
–
–
–
–
–
Pin Status
PD72001-11, 72001-A8
Retains current status
Retains current status
Retains current status
Depends on PRI
High impedance
Channel reset
“H”
“H”
“L”
“L”
–
–
–
–
–
–
–
–
–
–
–
– : Undefined